just have all targets create the DwarfWriter.

[oota-llvm.git] / lib / Target / PowerPC / PPCHazardRecognizers.h

diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.h b/lib/Target/PowerPC/PPCHazardRecognizers.h
index 7ba2e6e71308f2a0e02faeb4e66e70a1712e40d1..74bf8e52d8fa3a2d0fd72a830ec0bb860c77b143 100644 (file)
--- a/lib/Target/PowerPC/PPCHazardRecognizers.h
+++ b/lib/Target/PowerPC/PPCHazardRecognizers.h
@@ -14,7 +14,8 @@
 #ifndef PPCHAZRECS_H
 #define PPCHAZRECS_H
 
-#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
+#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "PPCInstrInfo.h"
 
 namespace llvm {
@@ -25,7 +26,7 @@ namespace llvm {
 /// avoid structural hazards that cause significant performance penalties (e.g.
 /// setting the CTR register then branching through it within a dispatch group),
 /// or storing then loading from the same address within a dispatch group.
-class PPCHazardRecognizer970 : public HazardRecognizer {
+class PPCHazardRecognizer970 : public ScheduleHazardRecognizer {
   const TargetInstrInfo &TII;
   
   unsigned NumIssued;  // Number of insts issued, including advanced cycles.
@@ -47,10 +48,9 @@ class PPCHazardRecognizer970 : public HazardRecognizer {
   
 public:
   PPCHazardRecognizer970(const TargetInstrInfo &TII);
-  virtual HazardType getHazardType(SDNode *Node);
-  virtual void EmitInstruction(SDNode *Node);
+  virtual HazardType getHazardType(SUnit *SU);
+  virtual void EmitInstruction(SUnit *SU);
   virtual void AdvanceCycle();
-  virtual void EmitNoop();
   
 private:
   /// EndDispatchGroup - Called when we are finishing a new dispatch group.