unsigned& sourceReg,
unsigned& destReg) const {
MachineOpCode oc = MI.getOpcode();
- if (oc == PPC::OR4 || oc == PPC::OR8 ||
+ if (oc == PPC::OR4 || oc == PPC::OR8 || oc == PPC::VOR ||
oc == PPC::OR4To8 || oc == PPC::OR8To4) { // or r1, r2, r2
assert(MI.getNumOperands() == 3 &&
MI.getOperand(0).isRegister() &&
}
unsigned PPCInstrInfo::isLoadFromStackSlot(MachineInstr *MI,
- int &FrameIndex) const {
+ int &FrameIndex) const {
switch (MI->getOpcode()) {
default: break;
case PPC::LD: