ARM assembly parsing for ASR(immediate).

[oota-llvm.git] / lib / Target / PowerPC / PPCInstrInfo.cpp

diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp
index 2bc109c8785a1eb920a46802c7b210d6f40bdf6e..f148e9daff22df234152f9d49d26d33f903265ea 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -52,8 +52,23 @@ ScheduleHazardRecognizer *PPCInstrInfo::CreateTargetHazardRecognizer(
   // Should use subtarget info to pick the right hazard recognizer.  For
   // now, always return a PPC970 recognizer.
   const TargetInstrInfo *TII = TM->getInstrInfo();
+  (void)TII;
   assert(TII && "No InstrInfo?");
-  return new PPCHazardRecognizer970(*TII);
+
+  unsigned Directive = TM->getSubtarget<PPCSubtarget>().getDarwinDirective();
+  if (Directive == PPC::DIR_440) {
+    // Disable the hazard recognizer for now, as it doesn't support
+    // bottom-up scheduling.
+    //const InstrItineraryData *II = TM->getInstrItineraryData();
+    //return new PPCHazardRecognizer440(II, DAG);
+    return new ScheduleHazardRecognizer();
+  }
+  else {
+    // Disable the hazard recognizer for now, as it doesn't support
+    // bottom-up scheduling.
+    //return new PPCHazardRecognizer970(*TII);
+    return new ScheduleHazardRecognizer();
+  }
 }
 
 unsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr *MI,