Fix operand numbers by marking variable arity nodes as such and by fixing

[oota-llvm.git] / lib / Target / PowerPC / PPCInstrInfo.td

diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 1e7c7a57fb14fe03bd3da44924dc1fdb5e76d688..a0d4e6b72f39c198c83e30e8c72dd195f648b860 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1,4 +1,3 @@
-
 //===- PowerPCInstrInfo.td - The PowerPC Instruction Set -----*- tablegen -*-=//
 // 
 //                     The LLVM Compiler Infrastructure
@@ -60,18 +59,19 @@ def crbitm: Operand<i8> {
 }
 
 // Pseudo-instructions:
-def PHI : Pseudo<(ops), "; PHI">;
+def PHI : Pseudo<(ops variable_ops), "; PHI">;
 let isLoad = 1 in {
-def ADJCALLSTACKDOWN : Pseudo<(ops), "; ADJCALLSTACKDOWN">;
-def ADJCALLSTACKUP : Pseudo<(ops), "; ADJCALLSTACKUP">;
+def ADJCALLSTACKDOWN : Pseudo<(ops u16imm), "; ADJCALLSTACKDOWN">;
+def ADJCALLSTACKUP : Pseudo<(ops u16imm), "; ADJCALLSTACKUP">;
 }
-def IMPLICIT_DEF : Pseudo<(ops), "; IMPLICIT_DEF">;
+def IMPLICIT_DEF : Pseudo<(ops variable_ops), "; IMPLICIT_DEF">;
 
 let Defs = [LR] in
   def MovePCtoLR : Pseudo<(ops piclabel:$label), "bl $label">;
 
 let isBranch = 1, isTerminator = 1 in {
-  def COND_BRANCH : Pseudo<(ops), "; COND_BRANCH">;
+  def COND_BRANCH : Pseudo<(ops CRRC:$crS, u16imm, target:$true, target:$false),
+                           "; COND_BRANCH">;
   def B   : IForm<18, 0, 0, (ops target:$func), "b $func">;
 //def BA  : IForm<18, 1, 0, (ops target:$func), "ba $func">;
   def BL  : IForm<18, 0, 1, (ops target:$func), "bl $func">;
@@ -100,8 +100,9 @@ let isCall = 1,
           LR,XER,CTR,
           CR0,CR1,CR5,CR6,CR7] in {
   // Convenient aliases for call instructions
-  def CALLpcrel : IForm<18, 0, 1, (ops target:$func), "bl $func">;
-  def CALLindirect : XLForm_2_ext<19, 528, 20, 0, 1, (ops), "bctrl">;
+  def CALLpcrel : IForm<18, 0, 1, (ops target:$func, variable_ops), "bl $func">;
+  def CALLindirect : XLForm_2_ext<19, 528, 20, 0, 1,
+                                  (ops variable_ops), "bctrl">;
 }
 
 // D-Form instructions.  Most instructions that perform an operation on a
@@ -364,10 +365,10 @@ def MCRF   : XLForm_3<19, 0, (ops CRRC:$BF, CRRC:$BFA),
 def MFCTR : XFXForm_1_ext<31, 339, 288, (ops GPRC:$rT), "mfctr $rT">;
 def MFLR  : XFXForm_1_ext<31, 339, 256, (ops GPRC:$rT), "mflr $rT">;
 def MFCR  : XFXForm_3<31, 19, (ops GPRC:$rT), "mfcr $rT">;
-def MTCRF : XFXForm_5<31, 0, 144, (ops CRRC:$FXM, GPRC:$rS),
+def MTCRF : XFXForm_5<31, 144, (ops CRRC:$FXM, GPRC:$rS),
                       "mtcrf $FXM, $rS">;
-def MFOCRF : XFXForm_5<31, 1, 19, (ops GPRC:$rT, crbitm:$FXM),
-                      "mfcr $rT, $FXM">;
+def MFOCRF : XFXForm_5a<31, 19, (ops GPRC:$rT, crbitm:$FXM),
+                        "mfcr $rT, $FXM">;
 def MTCTR : XFXForm_7_ext<31, 467, 288, (ops GPRC:$rS), "mtctr $rS">;
 def MTLR  : XFXForm_7_ext<31, 467, 256, (ops GPRC:$rS), "mtlr $rS">;