Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().

[oota-llvm.git] / lib / Target / PowerPC / PPCRegisterInfo.td

diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td
index 1acdf4eb853bc3b2808acdc6850708f45de7d4a9..066a8fb469a42900a7f68424240a000de64182b2 100644 (file)
--- a/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -1,10 +1,10 @@
-//===- PPCRegisterInfo.td - The PowerPC Register File ------*- tablegen -*-===//
-// 
+//===-- PPCRegisterInfo.td - The PowerPC Register File -----*- tablegen -*-===//
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
 //
 //
@@ -314,9 +314,7 @@ def CRBITRC : RegisterClass<"PPC", [i32], 32,
 }
 
 def CRRC : RegisterClass<"PPC", [i32], 32, (add CR0, CR1, CR5, CR6,
-                                                CR7, CR2, CR3, CR4)> {
-  let SubRegClasses = [(CRBITRC sub_lt, sub_gt, sub_eq, sub_un)];
-}
+                                                CR7, CR2, CR3, CR4)>;
 
 def CTRRC : RegisterClass<"PPC", [i32], 32, (add CTR)>;
 def CTRRC8 : RegisterClass<"PPC", [i64], 64, (add CTR8)>;