RISC architectures get their memory operand folding for free.

[oota-llvm.git] / lib / Target / PowerPC / PPCSubtarget.cpp

diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp
index c7a34280ea7e46d040c4eda90ae4d6738e218227..40914ba62a70ea054133db7a53bca663b245c7a1 100644 (file)
--- a/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by Nate Begeman and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -13,30 +13,12 @@
 
 #include "PPCSubtarget.h"
 #include "PPC.h"
-#include "llvm/Module.h"
-#include "llvm/Support/CommandLine.h"
+#include "llvm/GlobalValue.h"
+#include "llvm/Target/TargetMachine.h"
 #include "PPCGenSubtarget.inc"
-
+#include <cstdlib>
 using namespace llvm;
-PPCTargetEnum llvm::PPCTarget = TargetDefault;
-bool llvm::PPCGenerateStaticCode = false;
 
-namespace llvm {
-  cl::opt<PPCTargetEnum, true>
-  PPCTargetArg(cl::desc("Force generation of code for a specific PPC target:"),
-               cl::values(
-                          clEnumValN(TargetAIX,  "aix", "  Enable AIX codegen"),
-                          clEnumValN(TargetDarwin,"darwin",
-                                     "  Enable Darwin codegen"),
-                          clEnumValEnd),
-               cl::location(PPCTarget), cl::init(TargetDefault));
-  
-  cl::opt<bool, true>
-  PPCStaticCode("ppc-static",
-                cl::desc("PowerPC: generate completely non-pic code"),
-                cl::location(PPCGenerateStaticCode));
-} 
- 
 #if defined(__APPLE__)
 #include <mach/mach.h>
 #include <mach/mach_host.h>
@@ -75,16 +57,19 @@ static const char *GetCurrentPowerPCCPU() {
 #endif
 
 
-PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS)
+PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &FS,
+                           bool is64Bit)
   : StackAlignment(16)
-  , InstrItins()
+  , DarwinDirective(PPC::DIR_NONE)
   , IsGigaProcessor(false)
-  , Is64Bit(false)
-  , Has64BitRegs(false)
+  , Has64BitSupport(false)
+  , Use64BitRegs(false)
+  , IsPPC64(is64Bit)
   , HasAltivec(false)
   , HasFSQRT(false)
-  , IsAIX(false)
-  , IsDarwin(false) {
+  , HasSTFIWX(false)
+  , HasLazyResolverStubs(false)
+  , DarwinVers(0) {
 
   // Determine default and user specified characteristics
   std::string CPU = "generic";
@@ -95,16 +80,59 @@ PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS)
   // Parse features string.
   ParseSubtargetFeatures(FS, CPU);
 
+  // If we are generating code for ppc64, verify that options make sense.
+  if (is64Bit) {
+    Has64BitSupport = true;
+    // Silently force 64-bit register use on ppc64.
+    Use64BitRegs = true;
+  }
+  
+  // If the user requested use of 64-bit regs, but the cpu selected doesn't
+  // support it, ignore.
+  if (use64BitRegs() && !has64BitSupport())
+    Use64BitRegs = false;
+  
   // Set the boolean corresponding to the current target triple, or the default
   // if one cannot be determined, to true.
-  const std::string& TT = M.getTargetTriple();
-  if (TT.length() > 5) {
-    IsDarwin = TT.find("darwin") != std::string::npos;
-  } else if (TT.empty()) {
-#if defined(_POWER)
-    IsAIX = true;
-#elif defined(__APPLE__)
-    IsDarwin = true;
-#endif
+  if (TT.length() > 7) {
+    // Determine which version of darwin this is.
+    size_t DarwinPos = TT.find("-darwin");
+    if (DarwinPos != std::string::npos) {
+      if (isdigit(TT[DarwinPos+7]))
+        DarwinVers = atoi(&TT[DarwinPos+7]);
+      else
+        DarwinVers = 8;  // Minimum supported darwin is Tiger.
+    }
   }
+
+  // Set up darwin-specific properties.
+  if (isDarwin())
+    HasLazyResolverStubs = true;
+}
+
+/// SetJITMode - This is called to inform the subtarget info that we are
+/// producing code for the JIT.
+void PPCSubtarget::SetJITMode() {
+  // JIT mode doesn't want lazy resolver stubs, it knows exactly where
+  // everything is.  This matters for PPC64, which codegens in PIC mode without
+  // stubs.
+  HasLazyResolverStubs = false;
+}
+
+
+/// hasLazyResolverStub - Return true if accesses to the specified global have
+/// to go through a dyld lazy resolution stub.  This means that an extra load
+/// is required to get the address of the global.
+bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV,
+                                       const TargetMachine &TM) const {
+  // We never hae stubs if HasLazyResolverStubs=false or if in static mode.
+  if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
+    return false;
+  // If symbol visibility is hidden, the extra load is not needed if
+  // the symbol is definitely defined in the current translation unit.
+  bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
+  if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
+    return false;
+  return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
+         GV->hasCommonLinkage() || isDecl;
 }