Do not consider MMX_MOVD64rr a move instructions. The source register is in GR32...

[oota-llvm.git] / lib / Target / PowerPC / PPCSubtarget.cpp

diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp
index 14983fcf1de3c92fa38d964c85d8716bd3e01343..425d8e6195c6a5cd7491ba481d7d96bb7ad8b712 100644 (file)
--- a/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -16,6 +16,7 @@
 #include "llvm/Module.h"
 #include "llvm/Target/TargetMachine.h"
 #include "PPCGenSubtarget.inc"
+#include <cstdlib>
 using namespace llvm;
 
 #if defined(__APPLE__)
@@ -141,8 +142,11 @@ bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV) const {
   // We never hae stubs if HasLazyResolverStubs=false or if in static mode.
   if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
     return false;
-  
+  // If symbol visibility is hidden, the extra load is not needed if
+  // the symbol is definitely defined in the current translation unit.
+  bool isDecl = GV->isDeclaration() && !GV->hasNotBeenReadFromBitcode();
+  if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
+    return false;
   return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
-         GV->hasCommonLinkage() ||
-         (GV->isDeclaration() && !GV->hasNotBeenReadFromBitcode());
+         GV->hasCommonLinkage() || isDecl;
 }