Remove what little AIX support we have. It has never been tested and isn't

[oota-llvm.git] / lib / Target / PowerPC / PPCSubtarget.cpp

diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp
index 5393b1d6393afb3e60e3f0a970ebd1af4d1145c5..643acc2cb2d6826f314887fade3aec9773767726 100644 (file)
--- a/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -1,4 +1,4 @@
-//===- PowerPCSubtarget.cpp - PPC Subtarget Information ---------*- C++ -*-===//
+//===- PowerPCSubtarget.cpp - PPC Subtarget Information -------------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -14,31 +14,9 @@
 #include "PPCSubtarget.h"
 #include "PPC.h"
 #include "llvm/Module.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Target/SubtargetFeature.h"
 #include "PPCGenSubtarget.inc"
-
+#include <iostream>
 using namespace llvm;
-PPCTargetEnum llvm::PPCTarget = TargetDefault;
-
-namespace llvm {
-  cl::opt<PPCTargetEnum, true>
-  PPCTargetArg(cl::desc("Force generation of code for a specific PPC target:"),
-               cl::values(
-                          clEnumValN(TargetAIX,  "aix", "  Enable AIX codegen"),
-                          clEnumValN(TargetDarwin,"darwin",
-                                     "  Enable Darwin codegen"),
-                          clEnumValEnd),
-               cl::location(PPCTarget), cl::init(TargetDefault));
-} 
- 
-/// Length of FeatureKV.
-static const unsigned FeatureKVSize = sizeof(FeatureKV)
-                                          / sizeof(SubtargetFeatureKV);
-/// Length of SubTypeKV.
-static const unsigned SubTypeKVSize = sizeof(SubTypeKV)
-                                             / sizeof(SubtargetFeatureKV);
-
 
 #if defined(__APPLE__)
 #include <mach/mach.h>
@@ -77,31 +55,54 @@ static const char *GetCurrentPowerPCCPU() {
 }
 #endif
 
-PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS)
-  : StackAlignment(16), IsGigaProcessor(false), IsAIX(false), IsDarwin(false) {
+
+PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS, bool is64Bit)
+  : StackAlignment(16)
+  , InstrItins()
+  , IsGigaProcessor(false)
+  , Has64BitSupport(false)
+  , Use64BitRegs(false)
+  , IsPPC64(is64Bit)
+  , HasAltivec(false)
+  , HasFSQRT(false)
+  , HasSTFIWX(false)
+  , IsDarwin(false) {
 
   // Determine default and user specified characteristics
   std::string CPU = "generic";
 #if defined(__APPLE__)
   CPU = GetCurrentPowerPCCPU();
 #endif
-  uint32_t Bits =
-  SubtargetFeatures::Parse(FS, CPU,
-                           SubTypeKV, SubTypeKVSize, FeatureKV, FeatureKVSize);
-  IsGigaProcessor = (Bits & FeatureGPUL ) != 0;
-  Is64Bit         = (Bits & Feature64Bit) != 0;
-  HasFSQRT        = (Bits & FeatureFSqrt) != 0;
-  Has64BitRegs    = (Bits & Feature64BitRegs) != 0;
 
+  // Parse features string.
+  ParseSubtargetFeatures(FS, CPU);
+
+  // If we are generating code for ppc64, verify that options make sense.
+  if (is64Bit) {
+    if (!has64BitSupport()) {
+      std::cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
+                   "requested.  Ignoring 32-bit processor feature.\n";
+      Has64BitSupport = true;
+    }
+    // Silently force 64-bit register use on ppc64.
+    Use64BitRegs = true;
+  }
+  
+  // If the user requested use of 64-bit regs, but the cpu selected doesn't
+  // support it, warn and ignore.
+  if (use64BitRegs() && !has64BitSupport()) {
+    std::cerr << "PPC: 64-bit registers requested on CPU without support.  "
+                 "Disabling 64-bit register use.\n";
+    Use64BitRegs = false;
+  }
+  
   // Set the boolean corresponding to the current target triple, or the default
   // if one cannot be determined, to true.
   const std::string& TT = M.getTargetTriple();
   if (TT.length() > 5) {
-    IsDarwin = TT.find("darwin") != std::string::npos;
+    IsDarwin = TT.find("-darwin") != std::string::npos;
   } else if (TT.empty()) {
-#if defined(_POWER)
-    IsAIX = true;
-#elif defined(__APPLE__)
+#if defined(__APPLE__)
     IsDarwin = true;
 #endif
   }