Function temporaries can not overlap with retval or args.See the comment in source...

[oota-llvm.git] / lib / Target / PowerPC / PPCTargetMachine.cpp

diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index a09681ab15ba8447a0d93b1b06674b5fdc65a62f..0ff65d2a0d325892efabd065a2a4707a0b5c5382 100644 (file)
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -17,21 +17,32 @@
 #include "llvm/Module.h"
 #include "llvm/PassManager.h"
 #include "llvm/Target/TargetMachineRegistry.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
-namespace {
-  // Register the targets
-  RegisterTarget<PPC32TargetMachine>
-  X("ppc32", "  PowerPC 32");
-  RegisterTarget<PPC64TargetMachine>
-  Y("ppc64", "  PowerPC 64");
-}
+/// PowerPCTargetMachineModule - Note that this is used on hosts that
+/// cannot link in a library unless there are references into the
+/// library.  In particular, it seems that it is not possible to get
+/// things to work on Win32 without this.  Though it is unused, do not
+/// remove it.
+extern "C" int PowerPCTargetMachineModule;
+int PowerPCTargetMachineModule = 0;
+
+// Register the targets
+static RegisterTarget<PPC32TargetMachine>
+X("ppc32", "PowerPC 32");
+static RegisterTarget<PPC64TargetMachine>
+Y("ppc64", "PowerPC 64");
+
+// No assembler printer by default
+PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0;
 
 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
   if (Subtarget.isDarwin())
-    return new DarwinTargetAsmInfo(*this);
+    return new PPCDarwinTargetAsmInfo(*this);
   else
-    return new LinuxTargetAsmInfo(*this);
+    return new PPCLinuxTargetAsmInfo(*this);
 }
 
 unsigned PPC32TargetMachine::getJITMatchQuality() {
@@ -92,11 +103,12 @@ PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
     FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
     InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
 
-  if (getRelocationModel() == Reloc::Default)
+  if (getRelocationModel() == Reloc::Default) {
     if (Subtarget.isDarwin())
       setRelocationModel(Reloc::DynamicNoPIC);
     else
       setRelocationModel(Reloc::Static);
+  }
 }
 
 /// Override this for PowerPC.  Tail merging happily breaks up instruction issue
@@ -117,26 +129,29 @@ PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
 // Pass Pipeline Configuration
 //===----------------------------------------------------------------------===//
 
-bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   // Install an instruction selector.
   PM.add(createPPCISelDag(*this));
   return false;
 }
 
-bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   
   // Must run branch selection immediately preceding the asm printer.
   PM.add(createPPCBranchSelectionPass());
   return false;
 }
 
-bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
-                                          std::ostream &Out) {
-  PM.add(createPPCAsmPrinterPass(Out, *this));
+bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
+                                          raw_ostream &Out) {
+  assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+  if (AsmPrinterCtor)
+    PM.add(AsmPrinterCtor(Out, *this));
+
   return false;
 }
 
-bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
                                       bool DumpAsm, MachineCodeEmitter &MCE) {
   // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
   // FIXME: This should be moved to TargetJITInfo!!
@@ -145,6 +160,9 @@ bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
     // instructions to materialize arbitrary global variable + function +
     // constant pool addresses.
     setRelocationModel(Reloc::PIC_);
+    // Temporary workaround for the inability of PPC64 JIT to handle jump
+    // tables.
+    DisableJumpTables = true;      
   } else {
     setRelocationModel(Reloc::Static);
   }
@@ -155,16 +173,24 @@ bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
   
   // Machine code emitter pass for PowerPC.
   PM.add(createPPCCodeEmitterPass(*this, MCE));
-  if (DumpAsm) 
-    PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
+  if (DumpAsm) {
+    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+    if (AsmPrinterCtor)
+      PM.add(AsmPrinterCtor(errs(), *this));
+  }
+
   return false;
 }
 
-bool PPCTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
                                             bool DumpAsm, MachineCodeEmitter &MCE) {
   // Machine code emitter pass for PowerPC.
   PM.add(createPPCCodeEmitterPass(*this, MCE));
-  if (DumpAsm) 
-    PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
+  if (DumpAsm) {
+    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+    if (AsmPrinterCtor)
+      PM.add(AsmPrinterCtor(errs(), *this));
+  }
+
   return false;
 }