#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Analysis/Verifier.h"
-#include "llvm/CodeGen/IntrinsicLowering.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
namespace {
- static cl::opt<bool> DisablePPCDAGDAG("disable-ppc-dag-isel", cl::Hidden,
- cl::desc("Disable DAG-to-DAG isel for PPC"));
-
// Register the targets
RegisterTarget<PPCTargetMachine>
X("ppc32", " PowerPC");
return getJITMatchQuality()/2;
}
-PPCTargetMachine::PPCTargetMachine(const Module &M, IntrinsicLowering *IL,
- const std::string &FS)
-: TargetMachine("PowerPC", IL, false, 4, 4, 4, 4, 4, 4, 2, 1, 1),
- Subtarget(M, FS), FrameInfo(*this, false), JITInfo(*this) {
+PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS)
+: TargetMachine("PowerPC", false, 4, 4, 4, 4, 4, 4, 2, 1, 1),
+ Subtarget(M, FS), FrameInfo(*this, false), JITInfo(*this),
+ TLInfo(*this), InstrItins(Subtarget.getInstrItineraryData()) {
if (TargetDefault == PPCTarget) {
if (Subtarget.isAIX()) PPCTarget = TargetAIX;
if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
}
+ if (getRelocationModel() == Reloc::Default)
+ if (Subtarget.isDarwin())
+ setRelocationModel(Reloc::DynamicNoPIC);
+ else
+ setRelocationModel(Reloc::PIC);
}
/// addPassesToEmitFile - Add passes to the specified pass manager to implement
///
bool PPCTargetMachine::addPassesToEmitFile(PassManager &PM,
std::ostream &Out,
- CodeGenFileType FileType) {
+ CodeGenFileType FileType,
+ bool Fast) {
if (FileType != TargetMachine::AssemblyFile) return true;
-
+
// Run loop strength reduction before anything else.
- PM.add(createLoopStrengthReducePass());
+ if (!Fast) PM.add(createLoopStrengthReducePass(&TLInfo));
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
PM.add(createLowerInvokePass());
// Clean up after other passes, e.g. merging critical edges.
- PM.add(createCFGSimplificationPass());
+ if (!Fast) PM.add(createCFGSimplificationPass());
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
PM.add(createUnreachableBlockEliminationPass());
// Install an instruction selector.
- if (!DisablePPCDAGDAG)
- PM.add(createPPC32ISelDag(*this));
- else
- PM.add(createPPC32ISelPattern(*this));
+ PM.add(createPPCISelDag(*this));
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
}
void PPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
- // The JIT does not support or need PIC.
- PICEnabled = false;
+ // The JIT should use dynamic-no-pic relocation model.
+ TM.setRelocationModel(Reloc::DynamicNoPIC);
// Run loop strength reduction before anything else.
- PM.add(createLoopStrengthReducePass());
+ PM.add(createLoopStrengthReducePass(TM.getTargetLowering()));
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
PM.add(createUnreachableBlockEliminationPass());
// Install an instruction selector.
- if (!DisablePPCDAGDAG)
- PM.add(createPPC32ISelDag(TM));
- else
- PM.add(createPPC32ISelPattern(TM));
+ PM.add(createPPCISelDag(TM));
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());