R600/SI: Add pattern for zero-extending i1 to i32

[oota-llvm.git] / lib / Target / R600 / AMDGPUIntrinsics.td

diff --git a/lib/Target/R600/AMDGPUIntrinsics.td b/lib/Target/R600/AMDGPUIntrinsics.td
index 2ba2d4b90d21ec903482292a117e88b489822819..9f975bf9bf4545fd5b3120fa1feed86c45e0527d 100644 (file)
--- a/lib/Target/R600/AMDGPUIntrinsics.td
+++ b/lib/Target/R600/AMDGPUIntrinsics.td
@@ -51,7 +51,7 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in {
   def int_AMDGPU_umin : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
   def int_AMDGPU_cube : Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
 
-  def int_AMDGPU_shader_type : Intrinsic<[], [llvm_i32_ty], []>;
+  def int_AMDGPU_barrier_local  : Intrinsic<[], [], []>;
 }
 
 let TargetPrefix = "TGSI", isTarget = 1 in {