#include "SIISelLowering.h"
#include "SIInstrInfo.h"
#include "llvm/Analysis/Passes.h"
-#include "llvm/Analysis/Verifier.h"
#include "llvm/CodeGen/MachineFunctionAnalysis.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/Passes.h"
+#include "llvm/IR/Verifier.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/PassManager.h"
#include "llvm/Support/TargetRegistry.h"
}
static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) {
- return new ScheduleDAGMI(C, new R600SchedStrategy());
+ return new ScheduleDAGMILive(C, new R600SchedStrategy());
}
static MachineSchedRegistry
createR600MachineScheduler);
static std::string computeDataLayout(const AMDGPUSubtarget &ST) {
- std::string DataLayout = std::string(
- "e"
- "-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32"
- "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128"
- "-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048"
- "-n32:64"
- );
+ std::string Ret = "e-p:32:32";
- if (ST.hasHWFP64())
- DataLayout.append("-f64:64:64");
-
- if (!ST.is64bit())
- DataLayout.append("-p:32:32:32");
+ if (ST.is64bit()) {
+ // 32-bit private, local, and region pointers. 64-bit global and constant.
+ Ret += "-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64";
+ }
- if (ST.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS)
- DataLayout.append("-p3:32:32:32");
+ Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256"
+ "-v512:512-v1024:1024-v2048:2048-n32:64";
- return DataLayout;
+ return Ret;
}
AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT,