R600/SI: Emit config values in register value pairs.
[oota-llvm.git] / lib / Target / R600 / R600ControlFlowFinalizer.cpp
index cfaa36e12275f96caf5383e9015483d2b2307dad..bc1ca58b863e0c8e93f6b85abed3e04ae9e09d5a 100644 (file)
@@ -41,7 +41,7 @@ private:
     CF_ELSE,
     CF_POP
   };
-  
+
   static char ID;
   const R600InstrInfo *TII;
   unsigned MaxFetchInst;
@@ -67,6 +67,13 @@ private:
     case AMDGPU::TEX_SAMPLE_C_G:
     case AMDGPU::TXD:
     case AMDGPU::TXD_SHADOW:
+    case AMDGPU::VTX_READ_GLOBAL_8_eg:
+    case AMDGPU::VTX_READ_GLOBAL_32_eg:
+    case AMDGPU::VTX_READ_GLOBAL_128_eg:
+    case AMDGPU::VTX_READ_PARAM_8_eg:
+    case AMDGPU::VTX_READ_PARAM_16_eg:
+    case AMDGPU::VTX_READ_PARAM_32_eg:
+    case AMDGPU::VTX_READ_PARAM_128_eg:
      return true;
     default:
       return false;
@@ -207,6 +214,8 @@ public:
         case AMDGPU::EG_ExportSwz:
         case AMDGPU::R600_ExportBuf:
         case AMDGPU::R600_ExportSwz:
+        case AMDGPU::RAT_WRITE_CACHELESS_32_eg:
+        case AMDGPU::RAT_WRITE_CACHELESS_128_eg:
           DEBUG(dbgs() << CfCount << ":"; MI->dump(););
           CfCount++;
           break;
@@ -215,7 +224,7 @@ public:
           MaxStack = std::max(MaxStack, CurrentStack);
           MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
               getHWInstrDesc(CF_WHILE_LOOP))
-              .addImm(2);
+              .addImm(1);
           std::pair<unsigned, std::set<MachineInstr *> > Pair(CfCount,
               std::set<MachineInstr *>());
           Pair.second.insert(MIb);
@@ -270,6 +279,7 @@ public:
               getHWInstrDesc(CF_POP))
               .addImm(CfCount + 1)
               .addImm(1);
+          (void)MIb;
           DEBUG(dbgs() << CfCount << ":"; MIb->dump(););
           MI->eraseFromParent();
           CfCount++;
@@ -325,4 +335,3 @@ char R600ControlFlowFinalizer::ID = 0;
 llvm::FunctionPass *llvm::createR600ControlFlowFinalizer(TargetMachine &TM) {
   return new R600ControlFlowFinalizer(TM);
 }
-