R600/SI: Remove explicit m0 operand from v_interp instructions

[oota-llvm.git] / lib / Target / R600 / SIInstrInfo.td

diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
index 608240413acef11f88674f9c7d82809e6610bfdb..4e482b753806eb5c67468b719e6ec2c8da6dd5f3 100644 (file)
--- a/lib/Target/R600/SIInstrInfo.td
+++ b/lib/Target/R600/SIInstrInfo.td
@@ -1670,8 +1670,8 @@ class VINTRP_Real_vi <bits <2> op, string opName, dag outs, dag ins,
   SIMCInstr<opName, SISubtarget.VI>;
 
 multiclass VINTRP_m <bits <2> op, string opName, dag outs, dag ins, string asm,
-                     string disableEncoding = "", string constraints = "",
-                     list<dag> pattern = []> {
+                     list<dag> pattern = [],
+                     string disableEncoding = "", string constraints = ""> {
   let DisableEncoding = disableEncoding,
       Constraints = constraints in {
     def "" : VINTRP_Pseudo <opName, outs, ins, pattern>;