switch TargetLowering::getConstraintType to take the entire constraint,

[oota-llvm.git] / lib / Target / README.txt

diff --git a/lib/Target/README.txt b/lib/Target/README.txt
index 2f6ecfacd1255b49f08570edd1421fabec32ff90..8297bc3a8c8f781f43ea5a6542f73e3494a0c785 100644 (file)
--- a/lib/Target/README.txt
+++ b/lib/Target/README.txt
@@ -20,12 +20,14 @@ This has a number of uses:
 
 FreeBench/mason contains code like this:
 
-static p_type m0u(p_type p) {
+typedef struct { int a; int b; int c; } p_type;
+extern int m[];
+p_type m0u(p_type *p) {
   int m[]={0, 8, 1, 2, 16, 5, 13, 7, 14, 9, 3, 4, 11, 12, 15, 10, 17, 6};
   p_type pu;
-  pu.a = m[p.a];
-  pu.b = m[p.b];
-  pu.c = m[p.c];
+  pu.a = m[p->a];
+  pu.b = m[p->b];
+  pu.c = m[p->c];
   return pu;
 }
 
@@ -122,10 +124,6 @@ for 1,2,4,8 bytes.
 
 //===---------------------------------------------------------------------===//
 
-Add LSR exit value substitution. It'll probably be a win for Ackermann, etc.
-
-//===---------------------------------------------------------------------===//
-
 It would be nice to revert this patch:
 http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20060213/031986.html
 
@@ -135,9 +133,9 @@ stuff too.
 
 //===---------------------------------------------------------------------===//
 
-For packed types, TargetData.cpp::getTypeInfo() returns alignment that is equal
+For vector types, TargetData.cpp::getTypeInfo() returns alignment that is equal
 to the type size. It works but can be overly conservative as the alignment of
-specific packed types are target dependent.
+specific vector types are target dependent.
 
 //===---------------------------------------------------------------------===//
 
@@ -150,7 +148,7 @@ v4sf example(float *P) {
 
 //===---------------------------------------------------------------------===//
 
-We should constant fold packed type casts at the LLVM level, regardless of the
+We should constant fold vector type casts at the LLVM level, regardless of the
 cast.  Currently we cannot fold some casts because we don't have TargetData
 information in the constant folder, so we don't know the endianness of the 
 target!
@@ -348,46 +346,6 @@ pass.
 
 //===---------------------------------------------------------------------===//
 
--predsimplify should transform this:
-
-void bad(unsigned x)
-{
-  if (x > 4)
-    bar(12);
-  else if (x > 3)
-    bar(523);
-  else if (x > 2)
-    bar(36);
-  else if (x > 1)
-    bar(65);
-  else if (x > 0)
-    bar(45);
-  else
-    bar(367);
-}
-
-into:
-
-void good(unsigned x)
-{
-  if (x == 4)
-    bar(523);
-  else if (x == 3)
-    bar(36);
-  else if (x == 2)
-    bar(65);
-  else if (x == 1)
-    bar(45);
-  else if (x == 0)
-    bar(367);
-  else
-    bar(12);
-}
-
-to enable further optimizations.
-
-//===---------------------------------------------------------------------===//
-
 Consider:
 
 typedef unsigned U32;
@@ -415,3 +373,39 @@ when it is declared U32.
 
 //===---------------------------------------------------------------------===//
 
+Promote for i32 bswap can use i64 bswap + shr.  Useful on targets with 64-bit
+regs and bswap, like itanium.
+
+//===---------------------------------------------------------------------===//
+
+LSR should know what GPR types a target has.  This code:
+
+volatile short X, Y; // globals
+
+void foo(int N) {
+  int i;
+  for (i = 0; i < N; i++) { X = i; Y = i*4; }
+}
+
+produces two identical IV's (after promotion) on PPC/ARM:
+
+LBB1_1: @bb.preheader
+        mov r3, #0
+        mov r2, r3
+        mov r1, r3
+LBB1_2: @bb
+        ldr r12, LCPI1_0
+        ldr r12, [r12]
+        strh r2, [r12]
+        ldr r12, LCPI1_1
+        ldr r12, [r12]
+        strh r3, [r12]
+        add r1, r1, #1    <- [0,+,1]
+        add r3, r3, #4
+        add r2, r2, #1    <- [0,+,1]
+        cmp r1, r0
+        bne LBB1_2      @bb
+
+
+//===---------------------------------------------------------------------===//
+