ARM: r12 is callee-saved for interrupt handlers

[oota-llvm.git] / lib / Target / Sparc / Makefile

diff --git a/lib/Target/Sparc/Makefile b/lib/Target/Sparc/Makefile
index c171db77cf38ef32986b7555f6532973f7ca92bc..bcc02918cdb833488495a1b3da42fbef6928c54a 100644 (file)
--- a/lib/Target/Sparc/Makefile
+++ b/lib/Target/Sparc/Makefile
@@ -13,11 +13,12 @@ TARGET = Sparc
 
 # Make sure that tblgen is run, first thing.
 BUILT_SOURCES = SparcGenRegisterInfo.inc SparcGenInstrInfo.inc \
-               SparcGenAsmWriter.inc SparcGenDAGISel.inc \
+               SparcGenAsmWriter.inc SparcGenAsmMatcher.inc \
+               SparcGenDAGISel.inc SparcGenDisassemblerTables.inc \
                SparcGenSubtargetInfo.inc SparcGenCallingConv.inc \
-               SparcGenCodeEmitter.inc
+               SparcGenCodeEmitter.inc SparcGenMCCodeEmitter.inc
 
-DIRS = TargetInfo MCTargetDesc
+DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc
 
 include $(LEVEL)/Makefile.common