//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
def simm11 : PatLeaf<(imm), [{
// simm11 predicate - True if the imm fits in a 11-bit sign extended field.
- return (((int)N->getValue() << (32-11)) >> (32-11)) == (int)N->getValue();
+ return (((int)N->getZExtValue() << (32-11)) >> (32-11)) ==
+ (int)N->getZExtValue();
}]>;
def simm13 : PatLeaf<(imm), [{
// simm13 predicate - True if the imm fits in a 13-bit sign extended field.
- return (((int)N->getValue() << (32-13)) >> (32-13)) == (int)N->getValue();
+ return (((int)N->getZExtValue() << (32-13)) >> (32-13)) ==
+ (int)N->getZExtValue();
}]>;
def LO10 : SDNodeXForm<imm, [{
- return CurDAG->getTargetConstant((unsigned)N->getValue() & 1023, MVT::i32);
+ return CurDAG->getTargetConstant((unsigned)N->getZExtValue() & 1023,
+ MVT::i32);
}]>;
def HI22 : SDNodeXForm<imm, [{
// Transformation function: shift the immediate value down into the low bits.
- return CurDAG->getTargetConstant((unsigned)N->getValue() >> 10, MVT::i32);
+ return CurDAG->getTargetConstant((unsigned)N->getZExtValue() >> 10, MVT::i32);
}]>;
def SETHIimm : PatLeaf<(imm), [{
- return (((unsigned)N->getValue() >> 10) << 10) == (unsigned)N->getValue();
+ return (((unsigned)N->getZExtValue() >> 10) << 10) ==
+ (unsigned)N->getZExtValue();
}], HI22>;
// Addressing modes.
def SPselectfcc : SDNode<"SPISD::SELECT_FCC", SDTSPselectcc, [SDNPInFlag]>;
// These are target-independent nodes, but have target-specific formats.
-def SDT_SPCallSeq_start : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>;
-def SDT_SPCallSeq_end : SDTypeProfile<0, 2, [ SDTCisVT<0, i32>,
- SDTCisVT<1, i32> ]>;
+def SDT_SPCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>;
+def SDT_SPCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>,
+ SDTCisVT<1, i32> ]>;
-def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_SPCallSeq_start,
+def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_SPCallSeqStart,
[SDNPHasChain, SDNPOutFlag]>;
-def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_SPCallSeq_end,
+def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_SPCallSeqEnd,
[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
def SDT_SPCall : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
def call : SDNode<"SPISD::CALL", SDT_SPCall,
- [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
+ [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
-def SDT_SPRetFlag : SDTypeProfile<0, 0, []>;
-def retflag : SDNode<"SPISD::RET_FLAG", SDT_SPRetFlag,
- [SDNPHasChain, SDNPOptInFlag]>;
+def retflag : SDNode<"SPISD::RET_FLAG", SDTNone,
+ [SDNPHasChain, SDNPOptInFlag]>;
//===----------------------------------------------------------------------===//
// SPARC Flag Conditions
let Defs = [O6], Uses = [O6] in {
def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt),
"!ADJCALLSTACKDOWN $amt",
- [(callseq_start imm:$amt)]>;
+ [(callseq_start timm:$amt)]>;
def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
"!ADJCALLSTACKUP $amt1",
- [(callseq_end imm:$amt1, imm:$amt2)]>;
+ [(callseq_end timm:$amt1, timm:$amt2)]>;
}
-def IMPLICIT_DEF_Int : Pseudo<(outs IntRegs:$dst), (ins),
- "!IMPLICIT_DEF $dst",
- [(set IntRegs:$dst, (undef))]>;
-def IMPLICIT_DEF_FP : Pseudo<(outs FPRegs:$dst), (ins), "!IMPLICIT_DEF $dst",
- [(set FPRegs:$dst, (undef))]>;
-def IMPLICIT_DEF_DFP : Pseudo<(outs DFPRegs:$dst), (ins), "!IMPLICIT_DEF $dst",
- [(set DFPRegs:$dst, (undef))]>;
-
+
// FpMOVD/FpNEGD/FpABSD - These are lowered to single-precision ops by the
// fpmover pass.
let Predicates = [HasNoV9] in { // Only emit these in V8 mode.
// zextload bool -> zextload byte
def : Pat<(i32 (zextloadi1 ADDRrr:$src)), (LDUBrr ADDRrr:$src)>;
def : Pat<(i32 (zextloadi1 ADDRri:$src)), (LDUBri ADDRri:$src)>;
-
-// truncstore bool -> truncstore byte.
-def : Pat<(truncstorei1 IntRegs:$src, ADDRrr:$addr),
- (STBrr ADDRrr:$addr, IntRegs:$src)>;
-def : Pat<(truncstorei1 IntRegs:$src, ADDRri:$addr),
- (STBri ADDRri:$addr, IntRegs:$src)>;