We need to propagate the debug location information even when dealing with the

[oota-llvm.git] / lib / Target / Sparc / SparcInstrInfo.td

diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td
index c9fba9d40cf0df806a3c5b568a632484bfaa6daa..2d6c9209e6aef1179f4743b862ec69d5c6a3206b 100644 (file)
--- a/lib/Target/Sparc/SparcInstrInfo.td
+++ b/lib/Target/Sparc/SparcInstrInfo.td
@@ -45,25 +45,29 @@ def UseDeprecatedInsts : Predicate<"Subtarget.useDeprecatedV8Instructions()">;
 
 def simm11  : PatLeaf<(imm), [{
   // simm11 predicate - True if the imm fits in a 11-bit sign extended field.
-  return (((int)N->getValue() << (32-11)) >> (32-11)) == (int)N->getValue();
+  return (((int)N->getZExtValue() << (32-11)) >> (32-11)) ==
+         (int)N->getZExtValue();
 }]>;
 
 def simm13  : PatLeaf<(imm), [{
   // simm13 predicate - True if the imm fits in a 13-bit sign extended field.
-  return (((int)N->getValue() << (32-13)) >> (32-13)) == (int)N->getValue();
+  return (((int)N->getZExtValue() << (32-13)) >> (32-13)) ==
+         (int)N->getZExtValue();
 }]>;
 
 def LO10 : SDNodeXForm<imm, [{
-  return CurDAG->getTargetConstant((unsigned)N->getValue() & 1023, MVT::i32);
+  return CurDAG->getTargetConstant((unsigned)N->getZExtValue() & 1023,
+                                   MVT::i32);
 }]>;
 
 def HI22 : SDNodeXForm<imm, [{
   // Transformation function: shift the immediate value down into the low bits.
-  return CurDAG->getTargetConstant((unsigned)N->getValue() >> 10, MVT::i32);
+  return CurDAG->getTargetConstant((unsigned)N->getZExtValue() >> 10, MVT::i32);
 }]>;
 
 def SETHIimm : PatLeaf<(imm), [{
-  return (((unsigned)N->getValue() >> 10) << 10) == (unsigned)N->getValue();
+  return (((unsigned)N->getZExtValue() >> 10) << 10) ==
+         (unsigned)N->getZExtValue();
 }], HI22>;
 
 // Addressing modes.
@@ -127,8 +131,7 @@ def SDT_SPCall    : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
 def call          : SDNode<"SPISD::CALL", SDT_SPCall,
                            [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
 
-def SDT_SPRetFlag : SDTypeProfile<0, 0, []>;
-def retflag       : SDNode<"SPISD::RET_FLAG", SDT_SPRetFlag,
+def retflag       : SDNode<"SPISD::RET_FLAG", SDTNone,
                            [SDNPHasChain, SDNPOptInFlag]>;
 
 //===----------------------------------------------------------------------===//
@@ -207,22 +210,12 @@ class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
 let Defs = [O6], Uses = [O6] in {
 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt),
                                "!ADJCALLSTACKDOWN $amt",
-                               [(callseq_start imm:$amt)]>;
+                               [(callseq_start timm:$amt)]>;
 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
                             "!ADJCALLSTACKUP $amt1",
-                            [(callseq_end imm:$amt1, imm:$amt2)]>;
+                            [(callseq_end timm:$amt1, timm:$amt2)]>;
 }
 
-let isImplicitDef = 1 in {
-def IMPLICIT_DEF_Int : Pseudo<(outs IntRegs:$dst), (ins),
-                              "!IMPLICIT_DEF $dst",
-                              [(set IntRegs:$dst, (undef))]>;
-def IMPLICIT_DEF_FP  : Pseudo<(outs FPRegs:$dst), (ins), "!IMPLICIT_DEF $dst",
-                              [(set FPRegs:$dst, (undef))]>;
-def IMPLICIT_DEF_DFP : Pseudo<(outs DFPRegs:$dst), (ins), "!IMPLICIT_DEF $dst",
-                              [(set DFPRegs:$dst, (undef))]>;
-}
-                              
 // FpMOVD/FpNEGD/FpABSD - These are lowered to single-precision ops by the 
 // fpmover pass.
 let Predicates = [HasNoV9] in {  // Only emit these in V8 mode.