#define SPARCTARGETMACHINE_H
#include "SparcInstrInfo.h"
-#include "SparcISelLowering.h"
-#include "SparcFrameLowering.h"
-#include "SparcSelectionDAGInfo.h"
#include "SparcSubtarget.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetData.h"
-#include "llvm/Target/TargetFrameLowering.h"
namespace llvm {
class SparcTargetMachine : public LLVMTargetMachine {
SparcSubtarget Subtarget;
- const TargetData DataLayout; // Calculates type size & alignment
- SparcTargetLowering TLInfo;
- SparcSelectionDAGInfo TSInfo;
- SparcInstrInfo InstrInfo;
- SparcFrameLowering FrameLowering;
public:
SparcTargetMachine(const Target &T, StringRef TT,
- StringRef CPU, StringRef FS,
+ StringRef CPU, StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
- CodeGenOpt::Level OL, bool is64bit);
+ CodeGenOpt::Level OL, bool is64bit);
- virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; }
- virtual const TargetFrameLowering *getFrameLowering() const {
- return &FrameLowering;
- }
- virtual const SparcSubtarget *getSubtargetImpl() const{ return &Subtarget; }
- virtual const SparcRegisterInfo *getRegisterInfo() const {
- return &InstrInfo.getRegisterInfo();
- }
- virtual const SparcTargetLowering* getTargetLowering() const {
- return &TLInfo;
- }
- virtual const SparcSelectionDAGInfo* getSelectionDAGInfo() const {
- return &TSInfo;
+ const SparcSubtarget *getSubtargetImpl() const override { return &Subtarget; }
+
+ SparcSubtarget *getSubtargetImpl() {
+ return static_cast<SparcSubtarget *>(TargetMachine::getSubtargetImpl());
}
- virtual const TargetData *getTargetData() const { return &DataLayout; }
// Pass Pipeline Configuration
- virtual bool addInstSelector(PassManagerBase &PM);
- virtual bool addPreEmitPass(PassManagerBase &PM);
+ TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
+ bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
};
/// SparcV8TargetMachine - Sparc 32-bit target machine
///
class SparcV8TargetMachine : public SparcTargetMachine {
+ virtual void anchor();
public:
SparcV8TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
+ const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
};
/// SparcV9TargetMachine - Sparc 64-bit target machine
///
class SparcV9TargetMachine : public SparcTargetMachine {
+ virtual void anchor();
public:
SparcV9TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
+ const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
};