void emitConstantValueOnly(const Constant *CV);
void emitGlobalConstant(const Constant *CV);
void printConstantPool(MachineConstantPool *MCP);
- void printOperand(const MachineOperand &MI);
+ void printOperand(const MachineInstr *MI, int opNum);
+ void printBaseOffsetPair (const MachineInstr *MI, int i, bool brackets=true);
void printMachineInstruction(const MachineInstr *MI);
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);
// FP Constants are printed as integer constants to avoid losing
// precision...
double Val = CFP->getValue();
- switch (CFP->getType()->getPrimitiveID()) {
+ switch (CFP->getType()->getTypeID()) {
default: assert(0 && "Unknown floating point type!");
case Type::FloatTyID: {
union FU { // Abide by C TBAA rules
const Type *type = CV->getType();
O << "\t";
- switch (type->getPrimitiveID()) {
+ switch (type->getTypeID()) {
case Type::BoolTyID: case Type::UByteTyID: case Type::SByteTyID:
O << ".byte";
break;
for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
I != E; ++I) {
// Print a label for the basic block.
- O << ".LBB" << NumberForBB[I->getBasicBlock()] << ":\t! "
- << I->getBasicBlock()->getName() << "\n";
+ O << ".LBB" << Mang->getValueName(MF.getFunction ())
+ << "_" << I->getNumber () << ":\t! "
+ << I->getBasicBlock ()->getName () << "\n";
for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
II != E; ++II) {
// Print the assembly for the instruction.
return result;
}
-void V8Printer::printOperand(const MachineOperand &MO) {
+void V8Printer::printOperand(const MachineInstr *MI, int opNum) {
+ const MachineOperand &MO = MI->getOperand (opNum);
const MRegisterInfo &RI = *TM.getRegisterInfo();
+ bool CloseParen = false;
+ if (MI->getOpcode() == V8::SETHIi && !MO.isRegister() && !MO.isImmediate()) {
+ O << "%hi(";
+ CloseParen = true;
+ } else if (MI->getOpcode() ==V8::ORri &&!MO.isRegister() &&!MO.isImmediate()) {
+ O << "%lo(";
+ CloseParen = true;
+ }
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
if (Value *V = MO.getVRegValueOrNull()) {
O << "<" << V->getName() << ">";
- return;
+ break;
}
// FALLTHROUGH
case MachineOperand::MO_MachineRegister:
O << "%" << LowercaseString (RI.get(MO.getReg()).Name);
else
O << "%reg" << MO.getReg();
- return;
+ break;
case MachineOperand::MO_SignExtendedImmed:
case MachineOperand::MO_UnextendedImmed:
O << (int)MO.getImmedValue();
- return;
- case MachineOperand::MO_PCRelativeDisp: {
- if (isa<GlobalValue> (MO.getVRegValue ())) {
- O << Mang->getValueName (MO.getVRegValue ());
- return;
- }
- assert (isa<BasicBlock> (MO.getVRegValue ())
- && "Trying to look up something which is not a BB in the NumberForBB map");
- ValueMapTy::const_iterator i = NumberForBB.find(MO.getVRegValue());
- assert (i != NumberForBB.end()
- && "Could not find a BB in the NumberForBB map!");
- O << ".LBB" << i->second << " ! PC rel: " << MO.getVRegValue()->getName();
+ break;
+ case MachineOperand::MO_MachineBasicBlock: {
+ MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
+ O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction())
+ << "_" << MBBOp->getNumber () << "\t! "
+ << MBBOp->getBasicBlock ()->getName ();
return;
}
+ case MachineOperand::MO_PCRelativeDisp:
+ std::cerr << "Shouldn't use addPCDisp() when building SparcV8 MachineInstrs";
+ abort ();
+ return;
case MachineOperand::MO_GlobalAddress:
O << Mang->getValueName(MO.getGlobal());
- return;
+ break;
case MachineOperand::MO_ExternalSymbol:
O << MO.getSymbolName();
- return;
+ break;
default:
- O << "<unknown operand type>"; return;
+ O << "<unknown operand type>"; break;
}
+ if (CloseParen) O << ")";
+}
+
+static bool isLoadInstruction (const MachineInstr *MI) {
+ switch (MI->getOpcode ()) {
+ case V8::LDSBmr:
+ case V8::LDSHmr:
+ case V8::LDUBmr:
+ case V8::LDUHmr:
+ case V8::LDmr:
+ case V8::LDDmr:
+ return true;
+ default:
+ return false;
+ }
+}
+
+static bool isStoreInstruction (const MachineInstr *MI) {
+ switch (MI->getOpcode ()) {
+ case V8::STBrm:
+ case V8::STHrm:
+ case V8::STrm:
+ case V8::STDrm:
+ return true;
+ default:
+ return false;
+ }
+}
+
+/// printBaseOffsetPair - Print two consecutive operands of MI, starting at #i,
+/// which form a base + offset pair (which may have brackets around it, if
+/// brackets is true, or may be in the form base - constant, if offset is a
+/// negative constant).
+///
+void V8Printer::printBaseOffsetPair (const MachineInstr *MI, int i,
+ bool brackets) {
+ if (brackets) O << "[";
+ printOperand (MI, i);
+ if (MI->getOperand (i + 1).isImmediate()) {
+ int Val = (int) MI->getOperand (i + 1).getImmedValue ();
+ if (Val != 0) {
+ O << ((Val >= 0) ? " + " : " - ");
+ O << ((Val >= 0) ? Val : -Val);
+ }
+ } else {
+ O << " + ";
+ printOperand (MI, i + 1);
+ }
+ if (brackets) O << "]";
}
/// printMachineInstruction -- Print out a single SparcV8 LLVM instruction
///
void V8Printer::printMachineInstruction(const MachineInstr *MI) {
unsigned Opcode = MI->getOpcode();
- const TargetInstrInfo &TII = TM.getInstrInfo();
+ const TargetInstrInfo &TII = *TM.getInstrInfo();
const TargetInstrDescriptor &Desc = TII.get(Opcode);
O << Desc.Name << " ";
+ // Printing memory instructions is a special case.
+ // for loads: %dest = op %base, offset --> op [%base + offset], %dest
+ // for stores: op %base, offset, %src --> op %src, [%base + offset]
+ if (isLoadInstruction (MI)) {
+ printBaseOffsetPair (MI, 1);
+ O << ", ";
+ printOperand (MI, 0);
+ O << "\n";
+ return;
+ } else if (isStoreInstruction (MI)) {
+ printOperand (MI, 2);
+ O << ", ";
+ printBaseOffsetPair (MI, 0);
+ O << "\n";
+ return;
+ } else if (Opcode == V8::JMPLrr) {
+ printBaseOffsetPair (MI, 1, false);
+ O << ", ";
+ printOperand (MI, 0);
+ O << "\n";
+ return;
+ }
+
// print non-immediate, non-register-def operands
// then print immediate operands
// then print register-def operands.
- std::vector<MachineOperand> print_order;
+ std::vector<int> print_order;
for (unsigned i = 0; i < MI->getNumOperands (); ++i)
if (!(MI->getOperand (i).isImmediate ()
|| (MI->getOperand (i).isRegister ()
&& MI->getOperand (i).isDef ())))
- print_order.push_back (MI->getOperand (i));
+ print_order.push_back (i);
for (unsigned i = 0; i < MI->getNumOperands (); ++i)
if (MI->getOperand (i).isImmediate ())
- print_order.push_back (MI->getOperand (i));
+ print_order.push_back (i);
for (unsigned i = 0; i < MI->getNumOperands (); ++i)
if (MI->getOperand (i).isRegister () && MI->getOperand (i).isDef ())
- print_order.push_back (MI->getOperand (i));
+ print_order.push_back (i);
for (unsigned i = 0, e = print_order.size (); i != e; ++i) {
- printOperand (print_order[i]);
+ printOperand (MI, print_order[i]);
if (i != (print_order.size () - 1))
O << ", ";
}
projects / oota-llvm.git / blobdiff