Disable a broken optimization

[oota-llvm.git] / lib / Target / SparcV8 / SparcV8ISelDAGToDAG.cpp

diff --git a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
index 7e017402a8ec2ffe31ade27da911db2a21303283..56dc26a2fa4a2a4895076960e58cf7c0117a4e81 100644 (file)
--- a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
@@ -150,6 +150,7 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
   setOperationAction(ISD::CTLZ , MVT::i32, Expand);
   setOperationAction(ISD::ROTL , MVT::i32, Expand);
   setOperationAction(ISD::ROTR , MVT::i32, Expand);
+  setOperationAction(ISD::BSWAP, MVT::i32, Expand);
 
   setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
   setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
@@ -160,11 +161,19 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
   setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
   setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
 
+  // Expand these to their default code.
+  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 
+  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+  setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
+
+  setStackPointerRegisterToSaveRestore(V8::O6);
+
   computeRegisterProperties();
 }
 
 const char *SparcV8TargetLowering::getTargetNodeName(unsigned Opcode) const {
   switch (Opcode) {
+  default: return 0;
   case V8ISD::CMPICC:     return "V8ISD::CMPICC";
   case V8ISD::CMPFCC:     return "V8ISD::CMPFCC";
   case V8ISD::BRICC:      return "V8ISD::BRICC";
@@ -436,7 +445,8 @@ SparcV8TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
       ObjSize = 8;
       // If we can store this directly into the outgoing slot, do so.  We can
       // do this when all ArgRegs are used and if the outgoing slot is aligned.
-      if (RegValuesToPass.size() >= 6 && ((ArgOffset-68) & 7) == 0) {
+      // FIXME: McGill/misr fails with this.
+      if (0 && RegValuesToPass.size() >= 6 && ((ArgOffset-68) & 7) == 0) {
         ValToStore = Val;
         break;
       }
@@ -661,16 +671,10 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
       std::vector<SDOperand> Ops;
       Ops.push_back(LHS);
       Ops.push_back(RHS);
-      SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops);
+      SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
       return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond);
     } else {
-      std::vector<MVT::ValueType> VTs;
-      VTs.push_back(MVT::i32);
-      VTs.push_back(MVT::Flag);
-      std::vector<SDOperand> Ops;
-      Ops.push_back(LHS);
-      Ops.push_back(RHS);
-      SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops);
+      SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
       return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond);
     }
   }
@@ -681,22 +685,25 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     SDOperand TrueVal = Op.getOperand(2);
     SDOperand FalseVal = Op.getOperand(3);
     
+    SDOperand CompareFlag;
     unsigned Opc;
-    Opc = LHS.getValueType() == MVT::i32 ? V8ISD::CMPICC : V8ISD::CMPFCC;
-    std::vector<MVT::ValueType> VTs;
-    VTs.push_back(LHS.getValueType());
-    VTs.push_back(MVT::Flag);
-    std::vector<SDOperand> Ops;
-    Ops.push_back(LHS);
-    Ops.push_back(RHS);
-    SDOperand CompareFlag = DAG.getNode(Opc, VTs, Ops).getValue(1);
-    
-    Opc = LHS.getValueType() == MVT::i32 ? 
-      V8ISD::SELECT_ICC : V8ISD::SELECT_FCC;
+    if (LHS.getValueType() == MVT::i32) {
+      std::vector<MVT::ValueType> VTs;
+      VTs.push_back(LHS.getValueType());   // subcc returns a value
+      VTs.push_back(MVT::Flag);
+      std::vector<SDOperand> Ops;
+      Ops.push_back(LHS);
+      Ops.push_back(RHS);
+      CompareFlag = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
+      Opc = V8ISD::SELECT_ICC;
+    } else {
+      CompareFlag = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
+      Opc = V8ISD::SELECT_FCC;
+    }
     return DAG.getNode(Opc, TrueVal.getValueType(), TrueVal, FalseVal, 
                        DAG.getConstant(CC, MVT::i32), CompareFlag);
   }
-  }  
+  }
 }
 
 MachineBasicBlock *