setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
+ setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand);
+ setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand);
+
// Turn FP extload into load/fextend
setOperationAction(ISD::EXTLOAD, MVT::f32, Expand);
LowerVAStart(SDOperand Chain, SDOperand VAListP, Value *VAListV,
SelectionDAG &DAG) {
- assert(0 && "Unimp");
- abort();
+ SDOperand Offset = DAG.getNode(ISD::ADD, MVT::i32,
+ DAG.getRegister(V8::I6, MVT::i32),
+ DAG.getConstant(VarArgsFrameOffset, MVT::i32));
+ return DAG.getNode(ISD::STORE, MVT::Other, Chain, Offset,
+ VAListP, DAG.getSrcValue(VAListV));
}
std::pair<SDOperand,SDOperand> SparcV8TargetLowering::
LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV,
const Type *ArgTy, SelectionDAG &DAG) {
- assert(0 && "Unimp");
- abort();
+ // Load the pointer out of the valist.
+ SDOperand Ptr = DAG.getLoad(MVT::i32, Chain,
+ VAListP, DAG.getSrcValue(VAListV));
+ MVT::ValueType ArgVT = getValueType(ArgTy);
+ SDOperand Val = DAG.getLoad(ArgVT, Ptr.getValue(1),
+ Ptr, DAG.getSrcValue(NULL));
+ // Increment the pointer.
+ Ptr = DAG.getNode(ISD::ADD, MVT::i32, Ptr,
+ DAG.getConstant(MVT::getSizeInBits(ArgVT)/8, MVT::i32));
+ // Store it back to the valist.
+ Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Ptr,
+ VAListP, DAG.getSrcValue(VAListV));
+ return std::make_pair(Val, Chain);
}
std::pair<SDOperand, SDOperand> SparcV8TargetLowering::
return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op);
case ISD::SINT_TO_FP: {
assert(Op.getOperand(0).getValueType() == MVT::i32);
- Op = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op);
+ Op = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0));
// Convert the int value to FP in an FP register.
return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Op);
}