if (isa<ConstantSDNode>(Addr.getOperand(1)) &&
Predicate_simm13(Addr.getOperand(1).Val))
return false; // Let the reg+imm pattern catch this!
+ if (Addr.getOperand(0).getOpcode() == V8ISD::Lo ||
+ Addr.getOperand(1).getOpcode() == V8ISD::Lo)
+ return false; // Let the reg+imm pattern catch this!
R1 = Select(Addr.getOperand(0));
R2 = Select(Addr.getOperand(1));
return true;
Offset = CurDAG->getTargetConstant(CN->getValue(), MVT::i32);
return true;
}
+ if (Addr.getOperand(0).getOpcode() == V8ISD::Lo) {
+ Base = Select(Addr.getOperand(1));
+ Offset = Addr.getOperand(0).getOperand(0);
+ return true;
+ }
+ if (Addr.getOperand(1).getOpcode() == V8ISD::Lo) {
+ Base = Select(Addr.getOperand(0));
+ Offset = Addr.getOperand(1).getOperand(0);
+ return true;
+ }
}
Base = Select(Addr);
Offset = CurDAG->getTargetConstant(0, MVT::i32);