Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a

[oota-llvm.git] / lib / Target / SparcV8 / SparcV8ISelSimple.cpp

diff --git a/lib/Target/SparcV8/SparcV8ISelSimple.cpp b/lib/Target/SparcV8/SparcV8ISelSimple.cpp
index 2e3530c3cf2590aec32e4147f46ec8222e2893bb..df668825a6f26e2acadadceb28ea6c712e6abeed 100644 (file)
--- a/lib/Target/SparcV8/SparcV8ISelSimple.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelSimple.cpp
@@ -243,9 +243,9 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
       abort();
     }
   } else if (isa<UndefValue>(C)) {
-    BuildMI(*MBB, IP, V8::IMPLICIT_DEF, 0, R);
+    BuildMI(*MBB, IP, V8::IMPLICIT_DEF_Int, 0, R);
     if (getClassB (C->getType ()) == cLong)
-      BuildMI(*MBB, IP, V8::IMPLICIT_DEF, 0, R+1);
+      BuildMI(*MBB, IP, V8::IMPLICIT_DEF_Int, 0, R+1);
     return;
   }
 
@@ -341,15 +341,15 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
     case cShort:
     case cInt:
     case cFloat:
-      BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]);
+      BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]);
       break;
     case cDouble:
     case cLong:
       // Double and Long use register pairs.
-      BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]);
+      BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]);
       ++ArgNo;
       if (ArgNo < 6)
-        BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]);
+        BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]);
       break;
     default:
       assert (0 && "type not handled");
@@ -367,7 +367,7 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
   // FIXME: We could avoid storing any args onto the stack that don't
   // need to be in memory, because they come before the ellipsis in the
   // parameter list (and thus could never be accessed through va_arg).
-  if (LF->getFunctionType ()->isVarArg ()) {
+  if (LF->getFunctionType()->isVarArg()) {
     for (unsigned i = 0; i < 6; ++i) {
       int FI = F->getFrameInfo()->CreateFixedObject(4, ArgOffset);
       assert (IAR != IAREnd
@@ -879,7 +879,7 @@ void V8ISel::visitCallInst(CallInst &I) {
                 "About to dereference past end of OutgoingArgRegs");
         BuildMI (BB, V8::ORrr, 2, *OAR++).addReg (V8::G0).addReg (ArgReg);
       } else {
-        BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (ArgReg);
       }
       ArgOffset += 4;
@@ -894,7 +894,7 @@ void V8ISel::visitCallInst(CallInst &I) {
                 "About to dereference past end of OutgoingArgRegs");
         BuildMI (BB, V8::LDri, 2, *OAR++).addFrameIndex (FI).addSImm (0);
       } else {
-        BuildMI (BB, V8::STFri, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STFri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (ArgReg);
       }
       ArgOffset += 4;
@@ -913,7 +913,7 @@ void V8ISel::visitCallInst(CallInst &I) {
       } else {
         unsigned TempReg = makeAnotherReg (Type::IntTy);
         BuildMI (BB, V8::LDri, 2, TempReg).addFrameIndex (FI).addSImm (0);
-        BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (TempReg);
       }
       ArgOffset += 4;
@@ -924,7 +924,7 @@ void V8ISel::visitCallInst(CallInst &I) {
       } else {
         unsigned TempReg = makeAnotherReg (Type::IntTy);
         BuildMI (BB, V8::LDri, 2, TempReg).addFrameIndex (FI).addSImm (4);
-        BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (TempReg);
       }
       ArgOffset += 4;
@@ -935,7 +935,7 @@ void V8ISel::visitCallInst(CallInst &I) {
                 "About to dereference past end of OutgoingArgRegs");
         BuildMI (BB, V8::ORrr, 2, *OAR++).addReg (V8::G0).addReg (ArgReg);
       } else {
-        BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (ArgReg);
       }
       ArgOffset += 4;
@@ -945,7 +945,7 @@ void V8ISel::visitCallInst(CallInst &I) {
                 "About to dereference past end of OutgoingArgRegs");
         BuildMI (BB, V8::ORrr, 2, *OAR++).addReg (V8::G0).addReg (ArgReg+1);
       } else {
-        BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (ArgReg+1);
       }
       ArgOffset += 4;
@@ -1062,7 +1062,7 @@ void V8ISel::visitBranchInst(BranchInst &I) {
       // CondReg=(<condition>);
       // If (CondReg==0) goto notTakenSuccMBB;
       unsigned CondReg = getReg (I.getCondition ());
-      BuildMI (BB, V8::CMPri, 2).addSImm (0).addReg (CondReg);
+      BuildMI (BB, V8::SUBCCri, 2, V8::G0).addReg(CondReg).addSImm(0);
       BuildMI (BB, V8::BE, 1).addMBB (notTakenSuccMBB);
       BuildMI (BB, V8::BA, 1).addMBB (takenSuccMBB);
       return;
@@ -1708,11 +1708,11 @@ void V8ISel::visitAllocaInst(AllocaInst &I) {
   BuildMI (BB, V8::ANDri, 2, StackAdjReg).addReg (TmpReg2).addSImm (-8);
 
   // Subtract size from stack pointer, thereby allocating some space.
-  BuildMI (BB, V8::SUBrr, 2, V8::SP).addReg (V8::SP).addReg (StackAdjReg);
+  BuildMI (BB, V8::SUBrr, 2, V8::O6).addReg (V8::O6).addReg (StackAdjReg);
 
   // Put a pointer to the space into the result register, by copying
   // the stack pointer.
-  BuildMI (BB, V8::ADDri, 2, getReg(I)).addReg (V8::SP).addSImm (96);
+  BuildMI (BB, V8::ADDri, 2, getReg(I)).addReg (V8::O6).addSImm (96);
 
   // Inform the Frame Information that we have just allocated a variable-sized
   // object.
@@ -1755,7 +1755,7 @@ void V8ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
     // Add the VarArgsOffset to the frame pointer, and copy it to the result.
     unsigned DestReg = getReg (CI.getOperand(1));
     unsigned Tmp = makeAnotherReg(Type::IntTy);
-    BuildMI (BB, V8::ADDri, 2, Tmp).addReg (V8::FP).addSImm (VarArgsOffset);
+    BuildMI (BB, V8::ADDri, 2, Tmp).addReg (V8::I6).addSImm (VarArgsOffset);
     BuildMI(BB, V8::STri, 3).addReg(DestReg).addSImm(0).addReg(Tmp);
     return;
   }