Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a

[oota-llvm.git] / lib / Target / SparcV8 / SparcV8ISelSimple.cpp

diff --git a/lib/Target/SparcV8/SparcV8ISelSimple.cpp b/lib/Target/SparcV8/SparcV8ISelSimple.cpp
index da97f971f186ecb374fc27b2ef6a9991ca465aa3..df668825a6f26e2acadadceb28ea6c712e6abeed 100644 (file)
--- a/lib/Target/SparcV8/SparcV8ISelSimple.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelSimple.cpp
@@ -102,7 +102,6 @@ namespace {
     void visitBranchInst(BranchInst &I);
     void visitUnreachableInst(UnreachableInst &I) {}
     void visitCastInst(CastInst &I);
-    void visitVANextInst(VANextInst &I);
     void visitVAArgInst(VAArgInst &I);
     void visitLoadInst(LoadInst &I);
     void visitStoreInst(StoreInst &I);
@@ -244,9 +243,9 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
       abort();
     }
   } else if (isa<UndefValue>(C)) {
-    BuildMI(*MBB, IP, V8::IMPLICIT_DEF, 0, R);
+    BuildMI(*MBB, IP, V8::IMPLICIT_DEF_Int, 0, R);
     if (getClassB (C->getType ()) == cLong)
-      BuildMI(*MBB, IP, V8::IMPLICIT_DEF, 0, R+1);
+      BuildMI(*MBB, IP, V8::IMPLICIT_DEF_Int, 0, R+1);
     return;
   }
 
@@ -342,15 +341,15 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
     case cShort:
     case cInt:
     case cFloat:
-      BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]);
+      BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]);
       break;
     case cDouble:
     case cLong:
       // Double and Long use register pairs.
-      BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]);
+      BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]);
       ++ArgNo;
       if (ArgNo < 6)
-        BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgNo]);
+        BuildMI(BB, V8::IMPLICIT_DEF_Int, 0, IncomingArgRegs[ArgNo]);
       break;
     default:
       assert (0 && "type not handled");
@@ -368,12 +367,12 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
   // FIXME: We could avoid storing any args onto the stack that don't
   // need to be in memory, because they come before the ellipsis in the
   // parameter list (and thus could never be accessed through va_arg).
-  if (LF->getFunctionType ()->isVarArg ()) {
+  if (LF->getFunctionType()->isVarArg()) {
     for (unsigned i = 0; i < 6; ++i) {
       int FI = F->getFrameInfo()->CreateFixedObject(4, ArgOffset);
       assert (IAR != IAREnd
               && "About to dereference past end of IncomingArgRegs");
-      BuildMI (BB, V8::ST, 3).addFrameIndex (FI).addSImm (0).addReg (*IAR++);
+      BuildMI (BB, V8::STri, 3).addFrameIndex (FI).addSImm (0).addReg (*IAR++);
       ArgOffset += 4;
     }
     // Reset the pointers now that we're done.
@@ -393,7 +392,7 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
         BuildMI (BB, V8::ORrr, 2, ArgReg).addReg (V8::G0).addReg (*IAR++);
       } else {
         int FI = F->getFrameInfo()->CreateFixedObject(4, ArgOffset);
-        BuildMI (BB, V8::LD, 3, ArgReg).addFrameIndex (FI).addSImm (0);
+        BuildMI (BB, V8::LDri, 3, ArgReg).addFrameIndex (FI).addSImm (0);
       }
       ArgOffset += 4;
     } else if (getClassB (A.getType ()) == cFloat) {
@@ -404,7 +403,7 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
         int FI = F->getFrameInfo()->CreateStackObject(4, FltAlign);
         assert (IAR != IAREnd
                 && "About to dereference past end of IncomingArgRegs");
-        BuildMI (BB, V8::ST, 3).addFrameIndex (FI).addSImm (0).addReg (*IAR++);
+        BuildMI (BB, V8::STri, 3).addFrameIndex (FI).addSImm (0).addReg (*IAR++);
         BuildMI (BB, V8::LDFri, 2, ArgReg).addFrameIndex (FI).addSImm (0);
       } else {
         int FI = F->getFrameInfo()->CreateFixedObject(4, ArgOffset);
@@ -419,19 +418,19 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
       unsigned DblAlign = TM.getTargetData().getDoubleAlignment();
       int FI = F->getFrameInfo()->CreateStackObject(8, DblAlign);
       if (ArgOffset < 92 && IAR != IAREnd) {
-        BuildMI (BB, V8::ST, 3).addFrameIndex (FI).addSImm (0).addReg (*IAR++);
+        BuildMI (BB, V8::STri, 3).addFrameIndex (FI).addSImm (0).addReg (*IAR++);
       } else {
         unsigned TempReg = makeAnotherReg (Type::IntTy);
-        BuildMI (BB, V8::LD, 2, TempReg).addFrameIndex (FI).addSImm (0);
-        BuildMI (BB, V8::ST, 3).addFrameIndex (FI).addSImm (0).addReg (TempReg);
+        BuildMI (BB, V8::LDri, 2, TempReg).addFrameIndex (FI).addSImm (0);
+        BuildMI (BB, V8::STri, 3).addFrameIndex (FI).addSImm (0).addReg (TempReg);
       }
       ArgOffset += 4;
       if (ArgOffset < 92 && IAR != IAREnd) {
-        BuildMI (BB, V8::ST, 3).addFrameIndex (FI).addSImm (4).addReg (*IAR++);
+        BuildMI (BB, V8::STri, 3).addFrameIndex (FI).addSImm (4).addReg (*IAR++);
       } else {
         unsigned TempReg = makeAnotherReg (Type::IntTy);
-        BuildMI (BB, V8::LD, 2, TempReg).addFrameIndex (FI).addSImm (4);
-        BuildMI (BB, V8::ST, 3).addFrameIndex (FI).addSImm (4).addReg (TempReg);
+        BuildMI (BB, V8::LDri, 2, TempReg).addFrameIndex (FI).addSImm (4);
+        BuildMI (BB, V8::STri, 3).addFrameIndex (FI).addSImm (4).addReg (TempReg);
       }
       ArgOffset += 4;
       BuildMI (BB, V8::LDDFri, 2, ArgReg).addFrameIndex (FI).addSImm (0);
@@ -443,7 +442,7 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
         BuildMI (BB, V8::ORrr, 2, ArgReg).addReg (V8::G0).addReg (*IAR++);
       } else {
         int FI = F->getFrameInfo()->CreateFixedObject(4, ArgOffset);
-        BuildMI (BB, V8::LD, 2, ArgReg).addFrameIndex (FI).addSImm (0);
+        BuildMI (BB, V8::LDri, 2, ArgReg).addFrameIndex (FI).addSImm (0);
       }
       ArgOffset += 4;
       // ...then do the second half
@@ -453,7 +452,7 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
         BuildMI (BB, V8::ORrr, 2, ArgReg+1).addReg (V8::G0).addReg (*IAR++);
       } else {
         int FI = F->getFrameInfo()->CreateFixedObject(4, ArgOffset);
-        BuildMI (BB, V8::LD, 2, ArgReg+1).addFrameIndex (FI).addSImm (0);
+        BuildMI (BB, V8::LDri, 2, ArgReg+1).addFrameIndex (FI).addSImm (0);
       }
       ArgOffset += 4;
     } else {
@@ -645,7 +644,7 @@ void V8ISel::emitFPToIntegerCast (MachineBasicBlock *BB,
   BuildMI (*BB, IP, FPStoreOpcode, 3).addFrameIndex (FI).addSImm (0)
     .addReg (TempReg);
   unsigned TempReg2 = makeAnotherReg (newTy);
-  BuildMI (*BB, IP, V8::LD, 3, TempReg2).addFrameIndex (FI).addSImm (0);
+  BuildMI (*BB, IP, V8::LDri, 3, TempReg2).addFrameIndex (FI).addSImm (0);
   emitIntegerCast (BB, IP, Type::IntTy, TempReg2, newTy, DestReg);
 }
 
@@ -699,7 +698,7 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
         // it using ldf into a floating point register. then do fitos.
         unsigned TmpReg = makeAnotherReg (newTy);
         int FI = F->getFrameInfo()->CreateStackObject(4, FltAlign);
-        BuildMI (*BB, IP, V8::ST, 3).addFrameIndex (FI).addSImm (0)
+        BuildMI (*BB, IP, V8::STri, 3).addFrameIndex (FI).addSImm (0)
           .addReg (SrcReg);
         BuildMI (*BB, IP, V8::LDFri, 2, TmpReg).addFrameIndex (FI).addSImm (0);
         BuildMI (*BB, IP, V8::FITOS, 1, DestReg).addReg(TmpReg);
@@ -721,7 +720,7 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
         unsigned DoubleAlignment = TM.getTargetData().getDoubleAlignment();
         unsigned TmpReg = makeAnotherReg (newTy);
         int FI = F->getFrameInfo()->CreateStackObject(8, DoubleAlignment);
-        BuildMI (*BB, IP, V8::ST, 3).addFrameIndex (FI).addSImm (0)
+        BuildMI (*BB, IP, V8::STri, 3).addFrameIndex (FI).addSImm (0)
           .addReg (SrcReg);
         BuildMI (*BB, IP, V8::LDDFri, 2, TmpReg).addFrameIndex (FI).addSImm (0);
         BuildMI (*BB, IP, V8::FITOD, 1, DestReg).addReg(TmpReg);
@@ -775,22 +774,22 @@ void V8ISel::visitLoadInst(LoadInst &I) {
   switch (getClassB (I.getType ())) {
    case cByte:
     if (I.getType ()->isSigned ())
-      BuildMI (BB, V8::LDSB, 2, DestReg).addReg (PtrReg).addSImm(0);
+      BuildMI (BB, V8::LDSBri, 2, DestReg).addReg (PtrReg).addSImm(0);
     else
-      BuildMI (BB, V8::LDUB, 2, DestReg).addReg (PtrReg).addSImm(0);
+      BuildMI (BB, V8::LDUBri, 2, DestReg).addReg (PtrReg).addSImm(0);
     return;
    case cShort:
     if (I.getType ()->isSigned ())
-      BuildMI (BB, V8::LDSH, 2, DestReg).addReg (PtrReg).addSImm(0);
+      BuildMI (BB, V8::LDSHri, 2, DestReg).addReg (PtrReg).addSImm(0);
     else
-      BuildMI (BB, V8::LDUH, 2, DestReg).addReg (PtrReg).addSImm(0);
+      BuildMI (BB, V8::LDUHri, 2, DestReg).addReg (PtrReg).addSImm(0);
     return;
    case cInt:
-    BuildMI (BB, V8::LD, 2, DestReg).addReg (PtrReg).addSImm(0);
+    BuildMI (BB, V8::LDri, 2, DestReg).addReg (PtrReg).addSImm(0);
     return;
    case cLong:
-    BuildMI (BB, V8::LD, 2, DestReg).addReg (PtrReg).addSImm(0);
-    BuildMI (BB, V8::LD, 2, DestReg+1).addReg (PtrReg).addSImm(4);
+    BuildMI (BB, V8::LDri, 2, DestReg).addReg (PtrReg).addSImm(0);
+    BuildMI (BB, V8::LDri, 2, DestReg+1).addReg (PtrReg).addSImm(4);
     return;
    case cFloat:
     BuildMI (BB, V8::LDFri, 2, DestReg).addReg (PtrReg).addSImm(0);
@@ -811,17 +810,17 @@ void V8ISel::visitStoreInst(StoreInst &I) {
   unsigned PtrReg = getReg (I.getOperand (1));
   switch (getClassB (SrcVal->getType ())) {
    case cByte:
-    BuildMI (BB, V8::STB, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
+    BuildMI (BB, V8::STBri, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
     return;
    case cShort:
-    BuildMI (BB, V8::STH, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
+    BuildMI (BB, V8::STHri, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
     return;
    case cInt:
-    BuildMI (BB, V8::ST, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
+    BuildMI (BB, V8::STri, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
     return;
    case cLong:
-    BuildMI (BB, V8::ST, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
-    BuildMI (BB, V8::ST, 3).addReg (PtrReg).addSImm (4).addReg (SrcReg+1);
+    BuildMI (BB, V8::STri, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
+    BuildMI (BB, V8::STri, 3).addReg (PtrReg).addSImm (4).addReg (SrcReg+1);
     return;
    case cFloat:
     BuildMI (BB, V8::STFri, 3).addReg (PtrReg).addSImm (0).addReg (SrcReg);
@@ -880,7 +879,7 @@ void V8ISel::visitCallInst(CallInst &I) {
                 "About to dereference past end of OutgoingArgRegs");
         BuildMI (BB, V8::ORrr, 2, *OAR++).addReg (V8::G0).addReg (ArgReg);
       } else {
-        BuildMI (BB, V8::ST, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (ArgReg);
       }
       ArgOffset += 4;
@@ -893,9 +892,9 @@ void V8ISel::visitCallInst(CallInst &I) {
         BuildMI (BB, V8::STFri, 3).addFrameIndex(FI).addSImm(0).addReg(ArgReg);
         assert (OAR != OAREnd &&
                 "About to dereference past end of OutgoingArgRegs");
-        BuildMI (BB, V8::LD, 2, *OAR++).addFrameIndex (FI).addSImm (0);
+        BuildMI (BB, V8::LDri, 2, *OAR++).addFrameIndex (FI).addSImm (0);
       } else {
-        BuildMI (BB, V8::STFri, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STFri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (ArgReg);
       }
       ArgOffset += 4;
@@ -910,22 +909,22 @@ void V8ISel::visitCallInst(CallInst &I) {
       if (ArgOffset < 92 && OAR != OAREnd) {
         assert (OAR != OAREnd &&
                 "About to dereference past end of OutgoingArgRegs");
-        BuildMI (BB, V8::LD, 2, *OAR++).addFrameIndex (FI).addSImm (0);
+        BuildMI (BB, V8::LDri, 2, *OAR++).addFrameIndex (FI).addSImm (0);
       } else {
         unsigned TempReg = makeAnotherReg (Type::IntTy);
-        BuildMI (BB, V8::LD, 2, TempReg).addFrameIndex (FI).addSImm (0);
-        BuildMI (BB, V8::ST, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::LDri, 2, TempReg).addFrameIndex (FI).addSImm (0);
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (TempReg);
       }
       ArgOffset += 4;
       if (ArgOffset < 92 && OAR != OAREnd) {
         assert (OAR != OAREnd &&
                 "About to dereference past end of OutgoingArgRegs");
-        BuildMI (BB, V8::LD, 2, *OAR++).addFrameIndex (FI).addSImm (4);
+        BuildMI (BB, V8::LDri, 2, *OAR++).addFrameIndex (FI).addSImm (4);
       } else {
         unsigned TempReg = makeAnotherReg (Type::IntTy);
-        BuildMI (BB, V8::LD, 2, TempReg).addFrameIndex (FI).addSImm (4);
-        BuildMI (BB, V8::ST, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::LDri, 2, TempReg).addFrameIndex (FI).addSImm (4);
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (TempReg);
       }
       ArgOffset += 4;
@@ -936,7 +935,7 @@ void V8ISel::visitCallInst(CallInst &I) {
                 "About to dereference past end of OutgoingArgRegs");
         BuildMI (BB, V8::ORrr, 2, *OAR++).addReg (V8::G0).addReg (ArgReg);
       } else {
-        BuildMI (BB, V8::ST, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (ArgReg);
       }
       ArgOffset += 4;
@@ -946,7 +945,7 @@ void V8ISel::visitCallInst(CallInst &I) {
                 "About to dereference past end of OutgoingArgRegs");
         BuildMI (BB, V8::ORrr, 2, *OAR++).addReg (V8::G0).addReg (ArgReg+1);
       } else {
-        BuildMI (BB, V8::ST, 3).addReg (V8::SP).addSImm (ArgOffset)
+        BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
           .addReg (ArgReg+1);
       }
       ArgOffset += 4;
@@ -1063,7 +1062,7 @@ void V8ISel::visitBranchInst(BranchInst &I) {
       // CondReg=(<condition>);
       // If (CondReg==0) goto notTakenSuccMBB;
       unsigned CondReg = getReg (I.getCondition ());
-      BuildMI (BB, V8::CMPri, 2).addSImm (0).addReg (CondReg);
+      BuildMI (BB, V8::SUBCCri, 2, V8::G0).addReg(CondReg).addSImm(0);
       BuildMI (BB, V8::BE, 1).addMBB (notTakenSuccMBB);
       BuildMI (BB, V8::BA, 1).addMBB (takenSuccMBB);
       return;
@@ -1481,11 +1480,11 @@ void V8ISel::visitBinaryOperator (Instruction &I) {
       unsigned Tmp = makeAnotherReg (I.getType ());
       // Sign extend into the Y register
       BuildMI (BB, V8::SRAri, 2, Tmp).addReg (Op0Reg).addZImm (31);
-      BuildMI (BB, V8::WRrr, 2, V8::Y).addReg (Tmp).addReg (V8::G0);
+      BuildMI (BB, V8::WRYrr, 2).addReg (Tmp).addReg (V8::G0);
       BuildMI (BB, V8::SDIVrr, 2, Dest).addReg (Op0Reg).addReg (Op1Reg);
     } else {
       // Zero extend into the Y register, ie, just set it to zero
-      BuildMI (BB, V8::WRrr, 2, V8::Y).addReg (V8::G0).addReg (V8::G0);
+      BuildMI (BB, V8::WRYrr, 2).addReg (V8::G0).addReg (V8::G0);
       BuildMI (BB, V8::UDIVrr, 2, Dest).addReg (Op0Reg).addReg (Op1Reg);
     }
 
@@ -1709,11 +1708,11 @@ void V8ISel::visitAllocaInst(AllocaInst &I) {
   BuildMI (BB, V8::ANDri, 2, StackAdjReg).addReg (TmpReg2).addSImm (-8);
 
   // Subtract size from stack pointer, thereby allocating some space.
-  BuildMI (BB, V8::SUBrr, 2, V8::SP).addReg (V8::SP).addReg (StackAdjReg);
+  BuildMI (BB, V8::SUBrr, 2, V8::O6).addReg (V8::O6).addReg (StackAdjReg);
 
   // Put a pointer to the space into the result register, by copying
   // the stack pointer.
-  BuildMI (BB, V8::ADDri, 2, getReg(I)).addReg (V8::SP).addSImm (96);
+  BuildMI (BB, V8::ADDri, 2, getReg(I)).addReg (V8::O6).addSImm (96);
 
   // Inform the Frame Information that we have just allocated a variable-sized
   // object.
@@ -1754,8 +1753,10 @@ void V8ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
 
   case Intrinsic::vastart: {
     // Add the VarArgsOffset to the frame pointer, and copy it to the result.
-    unsigned DestReg = getReg (CI);
-    BuildMI (BB, V8::ADDri, 2, DestReg).addReg (V8::FP).addSImm (VarArgsOffset);
+    unsigned DestReg = getReg (CI.getOperand(1));
+    unsigned Tmp = makeAnotherReg(Type::IntTy);
+    BuildMI (BB, V8::ADDri, 2, Tmp).addReg (V8::I6).addSImm (VarArgsOffset);
+    BuildMI(BB, V8::STri, 3).addReg(DestReg).addSImm(0).addReg(Tmp);
     return;
   }
 
@@ -1765,49 +1766,47 @@ void V8ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
 
   case Intrinsic::vacopy: {
     // Copy the va_list ptr (arg1) to the result.
-    unsigned DestReg = getReg (CI), SrcReg = getReg (CI.getOperand (1));
-    BuildMI (BB, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
+    unsigned DestReg = getReg (CI.getOperand(1)), SrcReg = getReg (CI.getOperand (2));
+    BuildMI(BB, V8::STri, 3).addReg(DestReg).addSImm(0).addReg(SrcReg);
     return;
   }
   }
 }
 
-void V8ISel::visitVANextInst (VANextInst &I) {
-  // Add the type size to the vararg pointer (arg0).
-  unsigned DestReg = getReg (I);
-  unsigned SrcReg = getReg (I.getOperand (0));
-  unsigned TySize = TM.getTargetData ().getTypeSize (I.getArgType ());
-  BuildMI (BB, V8::ADDri, 2, DestReg).addReg (SrcReg).addSImm (TySize);
-}
-
 void V8ISel::visitVAArgInst (VAArgInst &I) {
-  unsigned VAList = getReg (I.getOperand (0));
+  unsigned VAListPtr = getReg (I.getOperand (0));
   unsigned DestReg = getReg (I);
+  unsigned Size;
+  unsigned VAList = makeAnotherReg(Type::IntTy);
+  BuildMI(BB, V8::LDri, 2, VAList).addReg(VAListPtr).addSImm(0);
 
   switch (I.getType ()->getTypeID ()) {
   case Type::PointerTyID:
   case Type::UIntTyID:
   case Type::IntTyID:
-    BuildMI (BB, V8::LD, 2, DestReg).addReg (VAList).addSImm (0);
-    return;
+    Size = 4;
+    BuildMI (BB, V8::LDri, 2, DestReg).addReg (VAList).addSImm (0);
+    break;
 
   case Type::ULongTyID:
   case Type::LongTyID:
-    BuildMI (BB, V8::LD, 2, DestReg).addReg (VAList).addSImm (0);
-    BuildMI (BB, V8::LD, 2, DestReg+1).addReg (VAList).addSImm (4);
-    return;
+    Size = 8;
+    BuildMI (BB, V8::LDri, 2, DestReg).addReg (VAList).addSImm (0);
+    BuildMI (BB, V8::LDri, 2, DestReg+1).addReg (VAList).addSImm (4);
+    break;
 
   case Type::DoubleTyID: {
+    Size = 8;
     unsigned DblAlign = TM.getTargetData().getDoubleAlignment();
     unsigned TempReg = makeAnotherReg (Type::IntTy);
     unsigned TempReg2 = makeAnotherReg (Type::IntTy);
     int FI = F->getFrameInfo()->CreateStackObject(8, DblAlign);
-    BuildMI (BB, V8::LD, 2, TempReg).addReg (VAList).addSImm (0);
-    BuildMI (BB, V8::LD, 2, TempReg2).addReg (VAList).addSImm (4);
-    BuildMI (BB, V8::ST, 3).addFrameIndex (FI).addSImm (0).addReg (TempReg);
-    BuildMI (BB, V8::ST, 3).addFrameIndex (FI).addSImm (4).addReg (TempReg2);
+    BuildMI (BB, V8::LDri, 2, TempReg).addReg (VAList).addSImm (0);
+    BuildMI (BB, V8::LDri, 2, TempReg2).addReg (VAList).addSImm (4);
+    BuildMI (BB, V8::STri, 3).addFrameIndex (FI).addSImm (0).addReg (TempReg);
+    BuildMI (BB, V8::STri, 3).addFrameIndex (FI).addSImm (4).addReg (TempReg2);
     BuildMI (BB, V8::LDDFri, 2, DestReg).addFrameIndex (FI).addSImm (0);
-    return;
+    break;
   }
 
   default:
@@ -1816,4 +1815,8 @@ void V8ISel::visitVAArgInst (VAArgInst &I) {
     abort ();
     return;
   }
+  unsigned tmp = makeAnotherReg(Type::IntTy);
+  BuildMI (BB, V8::ADDri, 2, tmp).addReg(VAList).addSImm(Size);
+  BuildMI(BB, V8::STri, 3).addReg(VAListPtr).addSImm(0).addReg(VAList);
+  return;
 }