Disable a broken optimization

[oota-llvm.git] / lib / Target / SparcV8 / SparcV8TargetMachine.cpp

diff --git a/lib/Target/SparcV8/SparcV8TargetMachine.cpp b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
index 7f19114b55d6d998b02df8c0e81cc0da3fec7396..08e38fc7a36c75bfe6b3bd86d77d9f520fb94916 100644 (file)
--- a/lib/Target/SparcV8/SparcV8TargetMachine.cpp
+++ b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
@@ -1,12 +1,12 @@
 //===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file was developed by the LLVM research group and is distributed under
 // the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
-// 
+//
 //
 //===----------------------------------------------------------------------===//
 
@@ -20,24 +20,26 @@
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Target/TargetMachineRegistry.h"
 #include "llvm/Transforms/Scalar.h"
+#include "llvm/Support/CommandLine.h"
 #include <iostream>
 using namespace llvm;
 
 namespace {
   // Register the target.
   RegisterTarget<SparcV8TargetMachine> X("sparcv8","  SPARC V8 (experimental)");
+
+  cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
+                                cl::desc("Enable DAG-to-DAG isel for V8"),
+                                cl::init(0));
 }
 
 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
 ///
 SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
-                                           IntrinsicLowering *IL)
+                                           IntrinsicLowering *IL,
+                                           const std::string &FS)
   : TargetMachine("SparcV8", IL, false, 4, 4),
-    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
-}
-
-unsigned SparcV8TargetMachine::getJITMatchQuality() {
-  return 0; // No JIT yet.
+    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
 }
 
 unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) {
@@ -56,39 +58,43 @@ unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) {
            M.getPointerSize() != Module::AnyPointerSize)
     return 0;                                    // Match for some other target
 
-  return getJITMatchQuality()/2;
+  return 0;
 }
 
-/// addPassesToEmitAssembly - Add passes to the specified pass manager
+/// addPassesToEmitFile - Add passes to the specified pass manager
 /// to implement a static compiler for this target.
 ///
-bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
-                                              std::ostream &Out) {
+bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
+                                               std::ostream &Out,
+                                               CodeGenFileType FileType,
+                                               bool Fast) {
+  if (FileType != TargetMachine::AssemblyFile) return true;
+
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());
 
-  // Replace malloc and free instructions with library calls.
-  PM.add(createLowerAllocationsPass());
-
-  // FIXME: implement the switch instruction in the instruction selector.
-  PM.add(createLowerSwitchPass());
-
   // FIXME: implement the invoke/unwind instructions!
   PM.add(createLowerInvokePass());
 
-  PM.add(createLowerConstantExpressionsPass());
-
-  // Make sure that no unreachable blocks are instruction selected.
-  PM.add(createUnreachableBlockEliminationPass());
-
-  // FIXME: implement the select instruction in the instruction selector.
-  PM.add(createLowerSelectPass());
+  // FIXME: implement the switch instruction in the instruction selector.
+  PM.add(createLowerSwitchPass());
 
   // Print LLVM code input to instruction selector:
   if (PrintMachineCode)
     PM.add(new PrintFunctionPass());
-  
-  PM.add(createSparcV8SimpleInstructionSelector(*this));
+
+  if (!EnableV8DAGDAG) {
+    // Replace malloc and free instructions with library calls.
+    PM.add(createLowerAllocationsPass());
+    PM.add(createLowerSelectPass());
+    // Make sure that no unreachable blocks are instruction selected.
+    PM.add(createUnreachableBlockEliminationPass());
+    PM.add(createSparcV8SimpleInstructionSelector(*this));
+  } else {
+    // Make sure that no unreachable blocks are instruction selected.
+    PM.add(createUnreachableBlockEliminationPass());
+    PM.add(createSparcV8ISelDag(*this));
+  }
 
   // Print machine instructions as they were initially generated.
   if (PrintMachineCode)
@@ -103,6 +109,7 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   PM.add(createSparcV8FPMoverPass(*this));
+
   PM.add(createSparcV8DelaySlotFillerPass(*this));
 
   // Print machine instructions after filling delay slots.
@@ -117,52 +124,3 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
   return false;
 }
 
-/// addPassesToJITCompile - Add passes to the specified pass manager to
-/// implement a fast dynamic compiler for this target.
-///
-void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
-  // FIXME: Implement efficient support for garbage collection intrinsics.
-  PM.add(createLowerGCPass());
-
-  // Replace malloc and free instructions with library calls.
-  PM.add(createLowerAllocationsPass());
-  
-  // FIXME: implement the switch instruction in the instruction selector.
-  PM.add(createLowerSwitchPass());
-
-  // FIXME: implement the invoke/unwind instructions!
-  PM.add(createLowerInvokePass());
-
-  PM.add(createLowerConstantExpressionsPass());
-  
-  // Make sure that no unreachable blocks are instruction selected.
-  PM.add(createUnreachableBlockEliminationPass());
-
-  // FIXME: implement the select instruction in the instruction selector.
-  PM.add(createLowerSelectPass());
-  
-  // Print LLVM code input to instruction selector:
-  if (PrintMachineCode)
-    PM.add(new PrintFunctionPass());
-  
-  PM.add(createSparcV8SimpleInstructionSelector(TM));
-
-  // Print machine instructions as they were initially generated.
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
-  PM.add(createRegisterAllocator());
-  PM.add(createPrologEpilogCodeInserter());
-
-  // Print machine instructions after register allocation and prolog/epilog
-  // insertion.
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
-  PM.add(createSparcV8FPMoverPass(TM));
-  PM.add(createSparcV8DelaySlotFillerPass(TM));
-
-  // Print machine instructions after filling delay slots.
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-}