Register allocation must be done as:
- MethodLiveVarInfo LVI(*MethodI ); // compute LV info
+ FunctionLiveVarInfo LVI(*FunctionI ); // compute LV info
LVI.analyze();
TargetMachine &target = ....
- PhyRegAlloc PRA(*MethodI, target, &LVI); // allocate regs
+ PhyRegAlloc PRA(*FunctionI, target, &LVI); // allocate regs
PRA.allocateRegisters();
*/
#include "llvm/CodeGen/RegClass.h"
#include "llvm/CodeGen/LiveRangeInfo.h"
-#include <deque>
-class MachineCodeForMethod;
+#include <vector>
+#include <map>
+
+class MachineFunction;
class MachineRegInfo;
-class MethodLiveVarInfo;
+class FunctionLiveVarInfo;
class MachineInstr;
-namespace cfg { class LoopInfo; }
+class LoopInfo;
//----------------------------------------------------------------------------
// Class AddedInstrns:
// to store such instructions added before and after an existing instruction.
//----------------------------------------------------------------------------
-class AddedInstrns
-{
- public:
- std::deque<MachineInstr*> InstrnsBefore;// Added insts BEFORE an existing inst
- std::deque<MachineInstr*> InstrnsAfter; // Added insts AFTER an existing inst
+struct AddedInstrns {
+ std::vector<MachineInstr*> InstrnsBefore;//Insts added BEFORE an existing inst
+ std::vector<MachineInstr*> InstrnsAfter; //Insts added AFTER an existing inst
};
-typedef std::hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
+typedef std::map<const MachineInstr *, AddedInstrns> AddedInstrMapType;
std::vector<RegClass *> RegClassList; // vector of register classes
const TargetMachine &TM; // target machine
- const Function *Meth; // name of the function we work on
- MachineCodeForMethod &mcInfo; // descriptor for method's native code
- MethodLiveVarInfo *const LVI; // LV information for this method
+ const Function *Fn; // name of the function we work on
+ MachineFunction &MF; // descriptor for method's native code
+ FunctionLiveVarInfo *const LVI; // LV information for this method
// (already computed for BBs)
LiveRangeInfo LRI; // LR info (will be computed)
const MachineRegInfo &MRI; // Machine Register information
AddedInstrMapType AddedInstrMap; // to store instrns added in this phase
- cfg::LoopInfo *LoopDepthCalc; // to calculate loop depths
+ AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
+ LoopInfo *LoopDepthCalc; // to calculate loop depths
ReservedColorListType ResColList; // A set of reserved regs if desired.
// currently not used
public:
- PhyRegAlloc(Function *F, const TargetMachine& TM, MethodLiveVarInfo *Lvi,
- cfg::LoopInfo *LoopDepthCalc);
+ PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi,
+ LoopInfo *LoopDepthCalc);
~PhyRegAlloc();
// main method called for allocating registers
friend class UltraSparcRegInfo;
- int getUsableUniRegAtMI(RegClass *RC, int RegType,
- const MachineInstr *MInst,
- const ValueSet *LVSetBef, MachineInstr *&MIBef,
- MachineInstr *&MIAft );
-
+ int getUsableUniRegAtMI(int RegType,
+ const ValueSet *LVSetBef,
+ MachineInstr *MInst,
+ std::vector<MachineInstr*>& MIBef,
+ std::vector<MachineInstr*>& MIAft);
+
int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst,
- const ValueSet *LVSetBef);
+ const ValueSet *LVSetBef);
void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);