* Machine dependent work: All parts of the register coloring algorithm
except coloring of an individual node are machine independent.
-
- Register allocation must be done as:
-
- FunctionLiveVarInfo LVI(*FunctionI ); // compute LV info
- LVI.analyze();
-
- TargetMachine &target = ....
-
-
- PhyRegAlloc PRA(*FunctionI, target, &LVI); // allocate regs
- PRA.allocateRegisters();
*/
#ifndef PHY_REG_ALLOC_H
#include "llvm/CodeGen/RegClass.h"
#include "llvm/CodeGen/LiveRangeInfo.h"
-#include <vector>
#include <map>
class MachineFunction;
std::vector<MachineInstr*> InstrnsAfter; //Insts added AFTER an existing inst
};
-typedef std::map<const MachineInstr *, AddedInstrns> AddedInstrMapType;
-
-
-
//----------------------------------------------------------------------------
// class PhyRegAlloc:
// Main class the register allocator. Call allocateRegisters() to allocate
// registers for a Function.
//----------------------------------------------------------------------------
-
class PhyRegAlloc: public NonCopyable {
-
std::vector<RegClass *> RegClassList; // vector of register classes
const TargetMachine &TM; // target machine
const Function *Fn; // name of the function we work on
const unsigned NumOfRegClasses; // recorded here for efficiency
- AddedInstrMapType AddedInstrMap; // to store instrns added in this phase
+ // AddedInstrMap - Used to store instrns added in this phase
+ std::map<const MachineInstr *, AddedInstrns> AddedInstrMap;
+
AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
LoopInfo *LoopDepthCalc; // to calculate loop depths
ReservedColorListType ResColList; // A set of reserved regs if desired.
private:
-
-
-
- //------- ------------------ private methods---------------------------------
-
void addInterference(const Value *Def, const ValueSet *LVSet,
bool isCallInst);
void printLabel(const Value *const Val);
void printMachineCode();
- friend class UltraSparcRegInfo;
+ friend class UltraSparcRegInfo; // FIXME: remove this
int getUsableUniRegAtMI(int RegType,
const ValueSet *LVSetBef,