#include "SparcInstrSelectionSupport.h"
#include "llvm/CodeGen/InstrSelection.h"
#include "llvm/CodeGen/InstrSelectionSupport.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/Function.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
+#include <stdlib.h>
using std::vector;
static const uint32_t MAXLO = (1 << 10) - 1; // set bits set by %lo(*)
}
+//---------------------------------------------------------------------------
+// Create a table of LLVM opcode -> max. immediate constant likely to
+// be usable for that operation.
+//---------------------------------------------------------------------------
+
+// Entry == 0 ==> no immediate constant field exists at all.
+// Entry > 0 ==> abs(immediate constant) <= Entry
+//
+vector<int> MaxConstantsTable(Instruction::OtherOpsEnd);
+
+static int
+MaxConstantForInstr(unsigned llvmOpCode)
+{
+ int modelOpCode = -1;
+
+ if (llvmOpCode >= Instruction::BinaryOpsBegin &&
+ llvmOpCode < Instruction::BinaryOpsEnd)
+ modelOpCode = ADD;
+ else
+ switch(llvmOpCode) {
+ case Instruction::Ret: modelOpCode = JMPLCALL; break;
+
+ case Instruction::Malloc:
+ case Instruction::Alloca:
+ case Instruction::GetElementPtr:
+ case Instruction::PHINode:
+ case Instruction::Cast:
+ case Instruction::Call: modelOpCode = ADD; break;
+
+ case Instruction::Shl:
+ case Instruction::Shr: modelOpCode = SLLX; break;
+
+ default: break;
+ };
+
+ return (modelOpCode < 0)? 0: SparcMachineInstrDesc[modelOpCode].maxImmedConst;
+}
+
+static void
+InitializeMaxConstantsTable()
+{
+ unsigned op;
+ assert(MaxConstantsTable.size() == Instruction::OtherOpsEnd &&
+ "assignments below will be illegal!");
+ for (op = Instruction::TermOpsBegin; op < Instruction::TermOpsEnd; ++op)
+ MaxConstantsTable[op] = MaxConstantForInstr(op);
+ for (op = Instruction::BinaryOpsBegin; op < Instruction::BinaryOpsEnd; ++op)
+ MaxConstantsTable[op] = MaxConstantForInstr(op);
+ for (op = Instruction::MemoryOpsBegin; op < Instruction::MemoryOpsEnd; ++op)
+ MaxConstantsTable[op] = MaxConstantForInstr(op);
+ for (op = Instruction::OtherOpsBegin; op < Instruction::OtherOpsEnd; ++op)
+ MaxConstantsTable[op] = MaxConstantForInstr(op);
+}
+
+
//---------------------------------------------------------------------------
// class UltraSparcInstrInfo
//
//---------------------------------------------------------------------------
/*ctor*/
-UltraSparcInstrInfo::UltraSparcInstrInfo(const TargetMachine& tgt)
- : MachineInstrInfo(tgt, SparcMachineInstrDesc,
+UltraSparcInstrInfo::UltraSparcInstrInfo()
+ : MachineInstrInfo(SparcMachineInstrDesc,
/*descSize = */ NUM_TOTAL_OPCODES,
/*numRealOpCodes = */ NUM_REAL_OPCODES)
{
+ InitializeMaxConstantsTable();
+}
+
+bool
+UltraSparcInstrInfo::ConstantMayNotFitInImmedField(const Constant* CV,
+ const Instruction* I) const
+{
+ if (I->getOpcode() >= MaxConstantsTable.size()) // user-defined op (or bug!)
+ return true;
+
+ if (isa<ConstantPointerNull>(CV)) // can always use %g0
+ return false;
+
+ if (const ConstantUInt* U = dyn_cast<ConstantUInt>(CV))
+ /* Large unsigned longs may really just be small negative signed longs */
+ return (labs((int64_t) U->getValue()) > MaxConstantsTable[I->getOpcode()]);
+
+ if (const ConstantSInt* S = dyn_cast<ConstantSInt>(CV))
+ return (labs(S->getValue()) > MaxConstantsTable[I->getOpcode()]);
+
+ if (isa<ConstantBool>(CV))
+ return (1 > MaxConstantsTable[I->getOpcode()]);
+
+ return true;
}
//
// GlobalValue, viz., the constant address of a global variable or function.
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
//
const Type* valType = val->getType();
+ // Unfortunate special case: a ConstantPointerRef is just a
+ // reference to GlobalValue.
+ if (isa<ConstantPointerRef>(val))
+ val = cast<ConstantPointerRef>(val)->getValue();
+
if (isa<GlobalValue>(val))
{
TmpInstruction* tmpReg =
mcfi.addTemp(tmpReg);
CreateSETXLabel(target, val, tmpReg, dest, mvec);
}
- else if (valType->isIntegral() || valType == Type::BoolTy)
+ else if (valType->isIntegral())
{
bool isValidConstant;
unsigned opSize = target.DataLayout.getTypeSize(val->getType());
mvec.push_back(MI);
// Make sure constant is emitted to constant pool in assembly code.
- MachineCodeForMethod::get(F).addToConstantPool(cast<Constant>(val));
+ MachineFunction::get(F).addToConstantPool(cast<Constant>(val));
}
}
-// Create an instruction sequence to copy an integer value `val'
-// to a floating point value `dest' by copying to memory and back.
+// Create an instruction sequence to copy an integer register `val'
+// to a floating point register `dest' by copying to memory and back.
// val must be an integral type. dest must be a Float or Double.
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
MachineCodeForInstruction& mcfi) const
{
assert((val->getType()->isIntegral() || isa<PointerType>(val->getType()))
- && "Source type must be integral");
+ && "Source type must be integral (integer or bool) or pointer");
assert(dest->getType()->isFloatingPoint()
&& "Dest type must be float/double");
-
- int offset = MachineCodeForMethod::get(F).allocateLocalVar(target, val);
-
+
+ // Get a stack slot to use for the copy
+ int offset = MachineFunction::get(F).allocateLocalVar(target, val);
+
+ // Get the size of the source value being copied.
+ size_t srcSize = target.DataLayout.getTypeSize(val->getType());
+
// Store instruction stores `val' to [%fp+offset].
- // The store and load opCodes are based on the value being copied, and
- // they use integer and float types that accomodate the
- // larger of the source type and the destination type:
- // On SparcV9: int for float, long for double.
+ // The store and load opCodes are based on the size of the source value.
+ // If the value is smaller than 32 bits, we must sign- or zero-extend it
+ // to 32 bits since the load-float will load 32 bits.
// Note that the store instruction is the same for signed and unsigned ints.
- Type* tmpType = (dest->getType() == Type::FloatTy)? Type::IntTy
- : Type::LongTy;
- MachineInstr* store = new MachineInstr(ChooseStoreInstruction(tmpType));
- store->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, val);
+ const Type* storeType = (srcSize <= 4)? Type::IntTy : Type::LongTy;
+ Value* storeVal = val;
+ if (srcSize < target.DataLayout.getTypeSize(Type::FloatTy))
+ { // sign- or zero-extend respectively
+ storeVal = new TmpInstruction(storeType, val);
+ if (val->getType()->isSigned())
+ CreateSignExtensionInstructions(target, F, val, storeVal, 8*srcSize,
+ mvec, mcfi);
+ else
+ CreateZeroExtensionInstructions(target, F, val, storeVal, 8*srcSize,
+ mvec, mcfi);
+ }
+ MachineInstr* store=new MachineInstr(ChooseStoreInstruction(storeType));
+ store->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, storeVal);
store->SetMachineOperandReg(1, target.getRegInfo().getFramePointer());
store->SetMachineOperandConst(2,MachineOperand::MO_SignExtendedImmed,offset);
mvec.push_back(store);
// Load instruction loads [%fp+offset] to `dest'.
+ // The type of the load opCode is the floating point type that matches the
+ // stored type in size:
+ // On SparcV9: float for int or smaller, double for long.
//
- MachineInstr* load =new MachineInstr(ChooseLoadInstruction(dest->getType()));
+ const Type* loadType = (srcSize <= 4)? Type::FloatTy : Type::DoubleTy;
+ MachineInstr* load = new MachineInstr(ChooseLoadInstruction(loadType));
load->SetMachineOperandReg(0, target.getRegInfo().getFramePointer());
load->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,offset);
load->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, dest);
mvec.push_back(load);
}
-
-// Similarly, create an instruction sequence to copy an FP value
-// `val' to an integer value `dest' by copying to memory and back.
+// Similarly, create an instruction sequence to copy an FP register
+// `val' to an integer register `dest' by copying to memory and back.
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
{
const Type* opTy = val->getType();
const Type* destTy = dest->getType();
-
+
assert(opTy->isFloatingPoint() && "Source type must be float/double");
assert((destTy->isIntegral() || isa<PointerType>(destTy))
- && "Dest type must be integral");
+ && "Dest type must be integer, bool or pointer");
+
+ int offset = MachineFunction::get(F).allocateLocalVar(target, val);
- int offset = MachineCodeForMethod::get(F).allocateLocalVar(target, val);
-
// Store instruction stores `val' to [%fp+offset].
// The store opCode is based only the source value being copied.
//
- MachineInstr* store=new MachineInstr(ChooseStoreInstruction(val->getType()));
+ MachineInstr* store=new MachineInstr(ChooseStoreInstruction(opTy));
store->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, val);
store->SetMachineOperandReg(1, target.getRegInfo().getFramePointer());
store->SetMachineOperandConst(2,MachineOperand::MO_SignExtendedImmed,offset);
mvec.push_back(store);
-
+
// Load instruction loads [%fp+offset] to `dest'.
// The type of the load opCode is the integer type that matches the
- // source type in size: (and the dest type in sign):
+ // source type in size:
// On SparcV9: int for float, long for double.
// Note that we *must* use signed loads even for unsigned dest types, to
- // ensure that we get the right sign-extension for smaller-than-64-bit
- // unsigned dest. types (i.e., UByte, UShort or UInt):
- const Type* loadTy = opTy == Type::FloatTy? Type::IntTy : Type::LongTy;
+ // ensure correct sign-extension for UByte, UShort or UInt:
+ //
+ const Type* loadTy = (opTy == Type::FloatTy)? Type::IntTy : Type::LongTy;
MachineInstr* load = new MachineInstr(ChooseLoadInstruction(loadTy));
load->SetMachineOperandReg(0, target.getRegInfo().getFramePointer());
load->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,offset);
// Create instruction(s) to copy src to dest, for arbitrary types
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateCopyInstructionsByType(const TargetMachine& target,
}
+// Helper function for sign-extension and zero-extension.
+// For SPARC v9, we sign-extend the given operand using SLL; SRA/SRL.
+inline void
+CreateBitExtensionInstructions(bool signExtend,
+ const TargetMachine& target,
+ Function* F,
+ Value* srcVal,
+ Value* destVal,
+ unsigned int numLowBits,
+ vector<MachineInstr*>& mvec,
+ MachineCodeForInstruction& mcfi)
+{
+ MachineInstr* M;
+
+ assert(numLowBits <= 32 && "Otherwise, nothing should be done here!");
+
+ if (numLowBits < 32)
+ { // SLL is needed since operand size is < 32 bits.
+ TmpInstruction *tmpI = new TmpInstruction(destVal->getType(),
+ srcVal, destVal, "make32");
+ mcfi.addTemp(tmpI);
+ M = Create3OperandInstr_UImmed(SLLX, srcVal, 32-numLowBits, tmpI);
+ mvec.push_back(M);
+ srcVal = tmpI;
+ }
+
+ M = Create3OperandInstr_UImmed(signExtend? SRA : SRL,
+ srcVal, 32-numLowBits, destVal);
+ mvec.push_back(M);
+}
+
+
// Create instruction sequence to produce a sign-extended register value
-// from an arbitrary sized value (sized in bits, not bytes).
-// For SPARC v9, we sign-extend the given unsigned operand using SLL; SRA.
+// from an arbitrary-sized integer value (sized in bits, not bytes).
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateSignExtensionInstructions(
const TargetMachine& target,
Function* F,
- Value* unsignedSrcVal,
- unsigned int srcSizeInBits,
- Value* dest,
+ Value* srcVal,
+ Value* destVal,
+ unsigned int numLowBits,
vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) const
{
- MachineInstr* M;
- assert(srcSizeInBits < 64 && "Sign extension unnecessary!");
- assert(srcSizeInBits > 0 && srcSizeInBits <= 32
- && "Hmmm... 32 < srcSizeInBits < 64 unexpected but could be handled here.");
-
- if (srcSizeInBits < 32)
- { // SLL is needed since operand size is < 32 bits.
- TmpInstruction *tmpI = new TmpInstruction(dest->getType(),
- unsignedSrcVal, dest,"make32");
- mcfi.addTemp(tmpI);
- M = Create3OperandInstr_UImmed(SLL,unsignedSrcVal,32-srcSizeInBits,tmpI);
- mvec.push_back(M);
- unsignedSrcVal = tmpI;
- }
-
- M = Create3OperandInstr_UImmed(SRA, unsignedSrcVal, 32-srcSizeInBits, dest);
- mvec.push_back(M);
+ CreateBitExtensionInstructions(/*signExtend*/ true, target, F, srcVal,
+ destVal, numLowBits, mvec, mcfi);
+}
+
+
+// Create instruction sequence to produce a zero-extended register value
+// from an arbitrary-sized integer value (sized in bits, not bytes).
+// For SPARC v9, we sign-extend the given operand using SLL; SRL.
+// The generated instructions are returned in `mvec'.
+// Any temp. registers (TmpInstruction) created are recorded in mcfi.
+// Any stack space required is allocated via MachineFunction.
+//
+void
+UltraSparcInstrInfo::CreateZeroExtensionInstructions(
+ const TargetMachine& target,
+ Function* F,
+ Value* srcVal,
+ Value* destVal,
+ unsigned int numLowBits,
+ vector<MachineInstr*>& mvec,
+ MachineCodeForInstruction& mcfi) const
+{
+ CreateBitExtensionInstructions(/*signExtend*/ false, target, F, srcVal,
+ destVal, numLowBits, mvec, mcfi);
}
projects / oota-llvm.git / blobdiff