-//===-- SparcInternals.h - Header file for Sparc backend ---------*- C++ -*--=//
-//
-// This file defines stuff that is to be private to the Sparc backend, but is
-// shared among different portions of the backend.
-//
-//===----------------------------------------------------------------------===//
+// $Id$ -*- C++ -*--
+//***************************************************************************
+// File:
+// SparcInternals.h
+//
+// Purpose:
+// This file defines stuff that is to be private to the Sparc
+// backend, but is shared among different portions of the backend.
+//**************************************************************************/
+
#ifndef SPARC_INTERNALS_H
#define SPARC_INTERNALS_H
#include "SparcRegClassInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MachineInstrInfo.h"
-
#include "llvm/Target/MachineSchedInfo.h"
+#include "llvm/Target/MachineFrameInfo.h"
+#include "llvm/Target/MachineCacheInfo.h"
#include "llvm/CodeGen/RegClass.h"
#include "llvm/Type.h"
class UltraSparcInstrInfo : public MachineInstrInfo {
public:
- /*ctor*/ UltraSparcInstrInfo();
+ /*ctor*/ UltraSparcInstrInfo(const TargetMachine& tgt);
virtual bool hasResultInterlock (MachineOpCode opCode) const
{
Instruction* dest,
vector<MachineInstr*>& minstrVec,
vector<TmpInstruction*>& tempVec) const;
-};
+
+ // Create an instruction sequence to copy an integer value `val'
+ // to a floating point value `dest' by copying to memory and back.
+ // val must be an integral type. dest must be a Float or Double.
+ // The generated instructions are returned in `minstrVec'.
+ // Any temp. registers (TmpInstruction) created are returned in `tempVec'.
+ //
+ virtual void CreateCodeToCopyIntToFloat(Method* method,
+ Value* val,
+ Instruction* dest,
+ vector<MachineInstr*>& minstrVec,
+ vector<TmpInstruction*>& tempVec,
+ TargetMachine& target) const;
+
+ // Similarly, create an instruction sequence to copy an FP value
+ // `val' to an integer value `dest' by copying to memory and back.
+ // See the previous function for information about return values.
+ //
+ virtual void CreateCodeToCopyFloatToInt(Method* method,
+ Value* val,
+ Instruction* dest,
+ vector<MachineInstr*>& minstrVec,
+ vector<TmpInstruction*>& tempVec,
+ TargetMachine& target) const;
+
+ // create copy instruction(s)
+ virtual void
+ CreateCopyInstructionsByType(const TargetMachine& target,
+ Value* src,
+ Instruction* dest,
+ vector<MachineInstr*>& minstrVec) const;
+};
//----------------------------------------------------------------------------
}
+ int getRegType(int reg) const {
+ if( reg < 32 )
+ return IntRegType;
+ else if ( reg < (32 + 32) )
+ return FPSingleRegType;
+ else if ( reg < (64 + 32) )
+ return FPDoubleRegType;
+ else if( reg < (64+32+4) )
+ return FloatCCRegType;
+ else if( reg < (64+32+4+2) )
+ return IntCCRegType;
+ else
+ assert(0 && "Invalid register number in getRegType");
+ }
+
+
// ***TODO: See this method is necessary
MachineInstr * cpCCR2IntMI(const unsigned IntReg) const;
MachineInstr * cpInt2CCRMI(const unsigned IntReg) const;
+
+
+ void moveInst2OrdVec(vector<MachineInstr *> &OrdVec, MachineInstr *UnordInst,
+ PhyRegAlloc &PRA ) const;
+
+ void OrderAddedInstrns( vector<MachineInstr *> &UnordVec,
+ vector<MachineInstr *> &OrdVec,
+ PhyRegAlloc &PRA) const;
+
+
+
+
+
+
+
public:
- UltraSparcRegInfo(const UltraSparc *const USI ) : UltraSparcInfo(USI),
+ UltraSparcRegInfo(const TargetMachine& tgt ) : MachineRegInfo(tgt),
+ UltraSparcInfo(& (const UltraSparc&) tgt),
NumOfIntArgRegs(6),
NumOfFloatArgRegs(32),
InvalidRegNum(1000),
else {
cerr << "TypeID: " << ty << endl;
assert(0 && "Cannot resolve register class for type");
+ return 0;
}
if(isCCReg)
class UltraSparcSchedInfo: public MachineSchedInfo {
public:
- /*ctor*/ UltraSparcSchedInfo (const MachineInstrInfo* mii);
+ /*ctor*/ UltraSparcSchedInfo (const TargetMachine& tgt);
/*dtor*/ virtual ~UltraSparcSchedInfo () {}
protected:
virtual void initializeResources ();
//
// Purpose:
// Interface to stack frame layout info for the UltraSPARC.
-// Note that there is no machine-independent interface to this information
//---------------------------------------------------------------------------
-class UltraSparcFrameInfo: public NonCopyable {
+class UltraSparcFrameInfo: public MachineFrameInfo {
public:
- static const int MinStackFrameSize = 176;
- static const int FirstOutgoingArgOffsetFromSP = 128;
- static const int FirstOptionalOutgoingArgOffsetFromSP = 176;
- static const int StaticStackAreaOffsetFromFP = -1;
+ /*ctor*/ UltraSparcFrameInfo(const TargetMachine& tgt) : MachineFrameInfo(tgt) {}
+
+public:
+ int getStackFrameSizeAlignment () const { return StackFrameSizeAlignment;}
+ int getMinStackFrameSize () const { return MinStackFrameSize; }
+ int getNumFixedOutgoingArgs () const { return NumFixedOutgoingArgs; }
+ int getSizeOfEachArgOnStack () const { return SizeOfEachArgOnStack; }
+ bool argsOnStackHaveFixedSize () const { return true; }
- static const int FirstIncomingArgOffsetFromFP = 126;
+ //
+ // These methods compute offsets using the frame contents for a
+ // particular method. The frame contents are obtained from the
+ // MachineCodeInfoForMethod object for the given method.
+ //
+ int getFirstIncomingArgOffset (MachineCodeForMethod& mcInfo,
+ bool& pos) const
+ {
+ pos = true; // arguments area grows upwards
+ return FirstIncomingArgOffsetFromFP;
+ }
+ int getFirstOutgoingArgOffset (MachineCodeForMethod& mcInfo,
+ bool& pos) const
+ {
+ pos = true; // arguments area grows upwards
+ return FirstOutgoingArgOffsetFromSP;
+ }
+ int getFirstOptionalOutgoingArgOffset(MachineCodeForMethod& mcInfo,
+ bool& pos)const
+ {
+ pos = true; // arguments area grows upwards
+ return FirstOptionalOutgoingArgOffsetFromSP;
+ }
+
+ int getFirstAutomaticVarOffset (MachineCodeForMethod& mcInfo,
+ bool& pos) const;
+ int getRegSpillAreaOffset (MachineCodeForMethod& mcInfo,
+ bool& pos) const;
+ int getTmpAreaOffset (MachineCodeForMethod& mcInfo,
+ bool& pos) const;
+ int getDynamicAreaOffset (MachineCodeForMethod& mcInfo,
+ bool& pos) const;
- static int getFirstAutomaticVarOffsetFromFP (const Method* method);
- static int getRegSpillAreaOffsetFromFP (const Method* method);
- static int getFrameSizeBelowDynamicArea (const Method* method);
+ //
+ // These methods specify the base register used for each stack area
+ // (generally FP or SP)
+ //
+ virtual int getIncomingArgBaseRegNum() const {
+ return (int) target.getRegInfo().getFramePointer();
+ }
+ virtual int getOutgoingArgBaseRegNum() const {
+ return (int) target.getRegInfo().getStackPointer();
+ }
+ virtual int getOptionalOutgoingArgBaseRegNum() const {
+ return (int) target.getRegInfo().getStackPointer();
+ }
+ virtual int getAutomaticVarBaseRegNum() const {
+ return (int) target.getRegInfo().getFramePointer();
+ }
+ virtual int getRegSpillAreaBaseRegNum() const {
+ return (int) target.getRegInfo().getFramePointer();
+ }
+ virtual int getDynamicAreaBaseRegNum() const {
+ return (int) target.getRegInfo().getStackPointer();
+ }
+
+private:
+ // All stack addresses must be offset by 0x7ff (2047) on Sparc V9.
+ static const int OFFSET = (int) 0x7ff;
+ static const int StackFrameSizeAlignment = 16;
+ static const int MinStackFrameSize = 176;
+ static const int NumFixedOutgoingArgs = 6;
+ static const int SizeOfEachArgOnStack = 8;
+ static const int StaticAreaOffsetFromFP = 0 + OFFSET;
+ static const int FirstIncomingArgOffsetFromFP = 128 + OFFSET;
+ static const int FirstOptionalIncomingArgOffsetFromFP = 176 + OFFSET;
+ static const int FirstOutgoingArgOffsetFromSP = 128 + OFFSET;
+ static const int FirstOptionalOutgoingArgOffsetFromSP = 176 + OFFSET;
};
+//---------------------------------------------------------------------------
+// class UltraSparcCacheInfo
+//
+// Purpose:
+// Interface to cache parameters for the UltraSPARC.
+// Just use defaults for now.
+//---------------------------------------------------------------------------
+
+class UltraSparcCacheInfo: public MachineCacheInfo {
+public:
+ /*ctor*/ UltraSparcCacheInfo (const TargetMachine& target) :
+ MachineCacheInfo(target) {}
+};
+
//---------------------------------------------------------------------------
// class UltraSparcMachine
UltraSparcSchedInfo schedInfo;
UltraSparcRegInfo regInfo;
UltraSparcFrameInfo frameInfo;
+ UltraSparcCacheInfo cacheInfo;
public:
UltraSparc();
virtual ~UltraSparc() {}
virtual const MachineInstrInfo &getInstrInfo() const { return instrInfo; }
virtual const MachineSchedInfo &getSchedInfo() const { return schedInfo; }
virtual const MachineRegInfo &getRegInfo() const { return regInfo; }
- const UltraSparcFrameInfo &getFrameInfo() const { return frameInfo; }
-
+ virtual const MachineFrameInfo &getFrameInfo() const { return frameInfo; }
+ virtual const MachineCacheInfo &getCacheInfo() const { return cacheInfo; }
// compileMethod - For the sparc, we do instruction selection, followed by
// delay slot scheduling, then register allocation.
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