-//===-- PrologEpilogCodeInserter.cpp - Insert Prolog & Epilog code for fn -===//
+//===-- SparcV9PrologEpilogCodeInserter.cpp - Insert Fn Prolog & Epilog ---===//
//
// The LLVM Compiler Infrastructure
//
#include "SparcV9Internals.h"
#include "SparcV9RegClassInfo.h"
+#include "SparcV9RegisterInfo.h"
+#include "SparcV9FrameInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineFunctionInfo.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
//------------------------------------------------------------------------
static unsigned getStaticStackSize (MachineFunction &MF) {
- const TargetFrameInfo& frameInfo = MF.getTarget().getFrameInfo();
+ const TargetFrameInfo& frameInfo = *MF.getTarget().getFrameInfo();
unsigned staticStackSize = MF.getInfo()->getStaticStackSize();
- if (staticStackSize < (unsigned) frameInfo.getMinStackFrameSize())
- staticStackSize = (unsigned) frameInfo.getMinStackFrameSize();
- if (unsigned padsz = (staticStackSize %
- (unsigned) frameInfo.getStackFrameSizeAlignment()))
- staticStackSize += frameInfo.getStackFrameSizeAlignment() - padsz;
+ if (staticStackSize < (unsigned)SparcV9FrameInfo::MinStackFrameSize)
+ staticStackSize = SparcV9FrameInfo::MinStackFrameSize;
+ if (unsigned padsz = staticStackSize %
+ SparcV9FrameInfo::StackFrameSizeAlignment)
+ staticStackSize += SparcV9FrameInfo::StackFrameSizeAlignment - padsz;
return staticStackSize;
}
{
std::vector<MachineInstr*> mvec;
const TargetMachine &TM = MF.getTarget();
- const TargetFrameInfo& frameInfo = TM.getFrameInfo();
+ const TargetFrameInfo& frameInfo = *TM.getFrameInfo();
// The second operand is the stack size. If it does not fit in the
// immediate field, we have to use a free register to hold the size.
//
unsigned staticStackSize = getStaticStackSize (MF);
int32_t C = - (int) staticStackSize;
- int SP = TM.getRegInfo().getStackPointer();
- if (TM.getInstrInfo().constantFitsInImmedField(V9::SAVEi,staticStackSize)) {
+ int SP = TM.getRegInfo()->getStackPointer();
+ if (TM.getInstrInfo()->constantFitsInImmedField(V9::SAVEi,staticStackSize)) {
mvec.push_back(BuildMI(V9::SAVEi, 3).addMReg(SP).addSImm(C)
.addMReg(SP, MachineOperand::Def));
} else {
// local (%l) and in (%i) registers cannot be used before the SAVE!
// Do this by creating a code sequence equivalent to:
// SETSW -(stackSize), %g1
- int uregNum = TM.getRegInfo().getUnifiedRegNum(
- TM.getRegInfo().getRegClassIDOfType(Type::IntTy),
+ int uregNum = TM.getRegInfo()->getUnifiedRegNum(
+ TM.getRegInfo()->getRegClassIDOfType(Type::IntTy),
SparcV9IntRegClass::g1);
MachineInstr* M = BuildMI(V9::SETHI, 2).addSImm(C)
.addMReg(uregNum, MachineOperand::Def);
- M->setOperandHi32(0);
+ M->getOperand(0).markHi32();
mvec.push_back(M);
M = BuildMI(V9::ORi, 3).addMReg(uregNum).addSImm(C)
.addMReg(uregNum, MachineOperand::Def);
- M->setOperandLo32(1);
+ M->getOperand(1).markLo32();
mvec.push_back(M);
M = BuildMI(V9::SRAi5, 3).addMReg(uregNum).addZImm(0)
//
if (MF.getFunction()->getFunctionType()->isVarArg()) {
int numFixedArgs = MF.getFunction()->getFunctionType()->getNumParams();
- int numArgRegs = TM.getRegInfo().getNumOfIntArgRegs();
+ int numArgRegs = TM.getRegInfo()->getNumOfIntArgRegs();
if (numFixedArgs < numArgRegs) {
- bool ignore;
- int firstArgReg = TM.getRegInfo().getUnifiedRegNum(
- TM.getRegInfo().getRegClassIDOfType(Type::IntTy),
+ const TargetFrameInfo &FI = *TM.getFrameInfo();
+ int firstArgReg = TM.getRegInfo()->getUnifiedRegNum(
+ TM.getRegInfo()->getRegClassIDOfType(Type::IntTy),
SparcV9IntRegClass::i0);
- int fpReg = TM.getFrameInfo().getIncomingArgBaseRegNum();
- int argSize = TM.getFrameInfo().getSizeOfEachArgOnStack();
- int firstArgOffset=TM.getFrameInfo().getFirstIncomingArgOffset(MF,ignore);
+ int fpReg = SparcV9::i6;
+ int argSize = 8;
+ int firstArgOffset= SparcV9FrameInfo::FirstIncomingArgOffsetFromFP;
int nextArgOffset = firstArgOffset + numFixedArgs * argSize;
for (int i=numFixedArgs; i < numArgRegs; ++i) {
void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
{
const TargetMachine &TM = MF.getTarget();
- const TargetInstrInfo &MII = TM.getInstrInfo();
+ const TargetInstrInfo &MII = *TM.getInstrInfo();
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
MachineBasicBlock &MBB = *I;
const Instruction *TermInst = (Instruction*)BB.getTerminator();
if (TermInst->getOpcode() == Instruction::Ret)
{
- int ZR = TM.getRegInfo().getZeroRegNum();
+ int ZR = TM.getRegInfo()->getZeroRegNum();
MachineInstr *Restore =
BuildMI(V9::RESTOREi, 3).addMReg(ZR).addSImm(0)
.addMReg(ZR, MachineOperand::Def);