Change MachineBasicBlock's vector of MachineInstr pointers into an

[oota-llvm.git] / lib / Target / SparcV9 / SparcV9PrologEpilogInserter.cpp

diff --git a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
index 5aa74f36052c37a23641cac0e677f816adb1020d..55db2334195d7d6c438573311de916900042246b 100644 (file)
--- a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
+++ b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
@@ -1,4 +1,11 @@
 //===-- PrologEpilogCodeInserter.cpp - Insert Prolog & Epilog code for fn -===//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
 //
 // Insert SAVE/RESTORE instructions for the function
 //
@@ -20,6 +27,8 @@
 #include "llvm/DerivedTypes.h"
 #include "llvm/Intrinsics.h"
 
+namespace llvm {
+
 namespace {
   struct InsertPrologEpilogCode : public MachineFunctionPass {
     const char *getPassName() const { return "Sparc Prolog/Epilog Inserter"; }
@@ -86,7 +95,7 @@ void InsertPrologEpilogCode::InsertPrologCode(MachineFunction &MF)
     M->setOperandLo32(1);
     mvec.push_back(M);
     
-    M = BuildMI(V9::SRAi6, 3).addMReg(uregNum).addZImm(0)
+    M = BuildMI(V9::SRAi5, 3).addMReg(uregNum).addZImm(0)
       .addMReg(uregNum, MOTy::Def);
     mvec.push_back(M);
     
@@ -133,8 +142,8 @@ void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
 
   for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
     MachineBasicBlock &MBB = *I;
-    BasicBlock &BB = *I->getBasicBlock();
-    Instruction *TermInst = (Instruction*)BB.getTerminator();
+    const BasicBlock &BB = *I->getBasicBlock();
+    const Instruction *TermInst = (Instruction*)BB.getTerminator();
     if (TermInst->getOpcode() == Instruction::Ret)
     {
       int ZR = TM.getRegInfo().getZeroRegNum();
@@ -146,18 +155,18 @@ void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
       
       // Remove the NOPs in the delay slots of the return instruction
       unsigned numNOPs = 0;
-      while (termMvec.back()->getOpCode() == V9::NOP)
+      while (termMvec.back()->getOpcode() == V9::NOP)
       {
-        assert( termMvec.back() == MBB.back());
-        delete MBB.pop_back();
+        assert( termMvec.back() == &MBB.back());
         termMvec.pop_back();
+        MBB.erase(&MBB.back());
         ++numNOPs;
       }
-      assert(termMvec.back() == MBB.back());
+      assert(termMvec.back() == &MBB.back());
         
       // Check that we found the right number of NOPs and have the right
       // number of instructions to replace them.
-      unsigned ndelays = MII.getNumDelaySlots(termMvec.back()->getOpCode());
+      unsigned ndelays = MII.getNumDelaySlots(termMvec.back()->getOpcode());
       assert(numNOPs == ndelays && "Missing NOPs in delay slots?");
       assert(ndelays == 1 && "Cannot use epilog code for delay slots?");
         
@@ -167,6 +176,8 @@ void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
   }
 }
 
-Pass* UltraSparc::getPrologEpilogInsertionPass() {
+FunctionPass *createPrologEpilogInsertionPass() {
   return new InsertPrologEpilogCode();
 }
+
+} // End llvm namespace