#include "SparcInternals.h"
#include "SparcRegClassInfo.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
-#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/InstrSelectionSupport.h"
#include "llvm/Pass.h"
#include "llvm/Function.h"
-#include "llvm/BasicBlock.h"
-#include "llvm/Instruction.h"
namespace {
-
-class InsertPrologEpilogCode : public FunctionPass {
- TargetMachine &Target;
-public:
- InsertPrologEpilogCode(TargetMachine &T) : Target(T) {}
- bool runOnFunction(Function *F) {
- MachineCodeForMethod &mcodeInfo = MachineCodeForMethod::get(F);
- if (!mcodeInfo.isCompiledAsLeafMethod()) {
- InsertPrologCode(F);
- InsertEpilogCode(F);
+ class InsertPrologEpilogCode : public FunctionPass {
+ TargetMachine &Target;
+ public:
+ InsertPrologEpilogCode(TargetMachine &T) : Target(T) {}
+
+ const char *getPassName() const { return "Sparc Prolog/Epilog Inserter"; }
+
+ bool runOnFunction(Function &F) {
+ MachineFunction &mcodeInfo = MachineFunction::get(&F);
+ if (!mcodeInfo.isCompiledAsLeafMethod()) {
+ InsertPrologCode(F);
+ InsertEpilogCode(F);
+ }
+ return false;
}
- return false;
- }
-
- void InsertPrologCode(Function *F);
- void InsertEpilogCode(Function *F);
-};
+
+ void InsertPrologCode(Function &F);
+ void InsertEpilogCode(Function &F);
+ };
} // End anonymous namespace
// Create prolog and epilog code for procedure entry and exit
//------------------------------------------------------------------------
-void InsertPrologEpilogCode::InsertPrologCode(Function *F)
+void InsertPrologEpilogCode::InsertPrologCode(Function &F)
{
- BasicBlock *entryBB = F->getEntryNode();
-
- vector<MachineInstr*> mvec;
+ std::vector<MachineInstr*> mvec;
MachineInstr* M;
const MachineFrameInfo& frameInfo = Target.getFrameInfo();
// The second operand is the stack size. If it does not fit in the
// immediate field, we have to use a free register to hold the size.
- // We will assume that local register `l0' is unused since the SAVE
- // instruction must be the first instruction in each procedure.
+ // See the comments below for the choice of this register.
//
- MachineCodeForMethod& mcInfo = MachineCodeForMethod::get(F);
- unsigned int staticStackSize = mcInfo.getStaticStackSize();
+ MachineFunction& mcInfo = MachineFunction::get(&F);
+ unsigned staticStackSize = mcInfo.getStaticStackSize();
if (staticStackSize < (unsigned) frameInfo.getMinStackFrameSize())
staticStackSize = (unsigned) frameInfo.getMinStackFrameSize();
-
+
if (unsigned padsz = (staticStackSize %
(unsigned) frameInfo.getStackFrameSizeAlignment()))
staticStackSize += frameInfo.getStackFrameSizeAlignment() - padsz;
- if (Target.getInstrInfo().constantFitsInImmedField(SAVE, staticStackSize))
- {
- M = new MachineInstr(SAVE);
- M->SetMachineOperandReg(0, Target.getRegInfo().getStackPointer());
- M->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,
- - (int) staticStackSize);
- M->SetMachineOperandReg(2, Target.getRegInfo().getStackPointer());
- mvec.push_back(M);
- }
- else
- {
- M = new MachineInstr(SETSW);
- M->SetMachineOperandConst(0, MachineOperand::MO_SignExtendedImmed,
- - (int) staticStackSize);
- M->SetMachineOperandReg(1, MachineOperand::MO_MachineRegister,
- Target.getRegInfo().getUnifiedRegNum(
+ int32_t C = - (int) staticStackSize;
+ int SP = Target.getRegInfo().getStackPointer();
+ if (Target.getInstrInfo().constantFitsInImmedField(SAVE, staticStackSize)) {
+ M = BuildMI(SAVE, 3).addMReg(SP).addSImm(C).addMReg(SP);
+ mvec.push_back(M);
+ } else {
+ // We have to put the stack size value into a register before SAVE.
+ // Use register %g1 since it is volatile across calls. Note that the
+ // local (%l) and in (%i) registers cannot be used before the SAVE!
+ // Do this by creating a code sequence equivalent to:
+ // SETSW -(stackSize), %g1
+ int uregNum = Target.getRegInfo().getUnifiedRegNum(
Target.getRegInfo().getRegClassIDOfType(Type::IntTy),
- SparcIntRegOrder::l0));
+ SparcIntRegClass::g1);
+
+ M = BuildMI(SETHI, 2).addSImm(C).addMReg(uregNum);
+ M->setOperandHi32(0);
mvec.push_back(M);
- M = new MachineInstr(SAVE);
- M->SetMachineOperandReg(0, Target.getRegInfo().getStackPointer());
- M->SetMachineOperandReg(1, MachineOperand::MO_MachineRegister,
- Target.getRegInfo().getUnifiedRegNum(
- Target.getRegInfo().getRegClassIDOfType(Type::IntTy),
- SparcIntRegOrder::l0));
- M->SetMachineOperandReg(2, Target.getRegInfo().getStackPointer());
+ M = BuildMI(OR, 3).addMReg(uregNum).addSImm(C).addMReg(uregNum);
+ M->setOperandLo32(1);
+ mvec.push_back(M);
+
+ M = BuildMI(SRA, 3).addMReg(uregNum).addZImm(0).addMReg(uregNum);
+ mvec.push_back(M);
+
+ // Now generate the SAVE using the value in register %g1
+ M = BuildMI(SAVE, 3).addMReg(SP).addMReg(uregNum).addMReg(SP);
mvec.push_back(M);
}
- MachineCodeForBasicBlock& bbMvec = entryBB->getMachineInstrVec();
- bbMvec.insert(entryBB->getMachineInstrVec().begin(),
- mvec.begin(), mvec.end());
+ MachineBasicBlock& bbMvec = mcInfo.front();
+ bbMvec.insert(bbMvec.begin(), mvec.begin(), mvec.end());
}
-void InsertPrologEpilogCode::InsertEpilogCode(Function *F)
+void InsertPrologEpilogCode::InsertEpilogCode(Function &F)
{
- for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) {
- Instruction *TermInst = (Instruction*)(*I)->getTerminator();
+ MachineFunction &MF = MachineFunction::get(&F);
+ for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
+ MachineBasicBlock &MBB = *I;
+ BasicBlock &BB = *I->getBasicBlock();
+ Instruction *TermInst = (Instruction*)BB.getTerminator();
if (TermInst->getOpcode() == Instruction::Ret)
{
- BasicBlock* exitBB = *I;
-
- MachineInstr *Restore = new MachineInstr(RESTORE);
- Restore->SetMachineOperandReg(0, Target.getRegInfo().getZeroRegNum());
- Restore->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,
- (int64_t)0);
- Restore->SetMachineOperandReg(2, Target.getRegInfo().getZeroRegNum());
+ int ZR = Target.getRegInfo().getZeroRegNum();
+ MachineInstr *Restore =
+ BuildMI(RESTORE, 3).addMReg(ZR).addSImm(0).addMReg(ZR);
- MachineCodeForBasicBlock& bbMvec = exitBB->getMachineInstrVec();
MachineCodeForInstruction &termMvec =
MachineCodeForInstruction::get(TermInst);
unsigned numNOPs = 0;
while (termMvec.back()->getOpCode() == NOP)
{
- assert( termMvec.back() == bbMvec.back());
- delete bbMvec.pop_back();
+ assert( termMvec.back() == MBB.back());
+ delete MBB.pop_back();
termMvec.pop_back();
++numNOPs;
}
- assert(termMvec.back() == bbMvec.back());
+ assert(termMvec.back() == MBB.back());
// Check that we found the right number of NOPs and have the right
// number of instructions to replace them.
assert(ndelays == 1 && "Cannot use epilog code for delay slots?");
// Append the epilog code to the end of the basic block.
- bbMvec.push_back(Restore);
+ MBB.push_back(Restore);
}
}
}
-Pass *createPrologEpilogCodeInserter(TargetMachine &TM) {
- return new InsertPrologEpilogCode(TM);
+Pass* UltraSparc::getPrologEpilogInsertionPass() {
+ return new InsertPrologEpilogCode(*this);
}
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