Remove usage of MachineBasicBlock::get

[oota-llvm.git] / lib / Target / SparcV9 / SparcV9RegInfo.cpp

diff --git a/lib/Target/SparcV9/SparcV9RegInfo.cpp b/lib/Target/SparcV9/SparcV9RegInfo.cpp
index 65539cf87e7bbcab7bb544b226aa6ccbb8c4a927..e80185841f67dcceb69b2a2bd3602dd850517b22 100644 (file)
--- a/lib/Target/SparcV9/SparcV9RegInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9RegInfo.cpp
@@ -8,7 +8,7 @@
 #include "SparcInternals.h"
 #include "SparcRegClassInfo.h"
 #include "llvm/Target/Sparc.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/PhyRegAlloc.h"
 #include "llvm/CodeGen/InstrSelection.h"
 #include "llvm/CodeGen/InstrSelectionSupport.h"
@@ -477,7 +477,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth,
                  regClassIDOfArgReg == IntRegClassID &&
                  "This should only be an Int register for an FP argument");
           
-         int TmpOff = MachineCodeForMethod::get(Meth).pushTempValue(target,  
+         int TmpOff = MachineFunction::get(Meth).pushTempValue(target,  
                                                 getSpilledRegSize(regType));
          cpReg2MemMI(FirstAI->InstrnsBefore,
                       UniArgReg, getFramePointer(), TmpOff, IntRegType);
@@ -496,7 +496,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth,
        //
         const MachineFrameInfo& frameInfo = target.getFrameInfo();
        int offsetFromFP =
-          frameInfo.getIncomingArgOffset(MachineCodeForMethod::get(Meth),
+          frameInfo.getIncomingArgOffset(MachineFunction::get(Meth),
                                          argNo);
         
        cpMem2RegMI(FirstAI->InstrnsBefore,
@@ -544,7 +544,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth,
 
         const MachineFrameInfo& frameInfo = target.getFrameInfo();
        int offsetFromFP =
-          frameInfo.getIncomingArgOffset(MachineCodeForMethod::get(Meth),
+          frameInfo.getIncomingArgOffset(MachineFunction::get(Meth),
                                          argNo);
         
        LR->modifySpillOffFromFP( offsetFromFP );
@@ -1599,11 +1599,10 @@ void UltraSparcRegInfo::OrderAddedInstrns(std::vector<MachineInstr*> &UnordVec,
       // last operand is the def (unless for a store which has no def reg)
       MachineOperand& DefOp = DefInst->getOperand(DefInst->getNumOperands()-1);
       
-      if( DefOp.opIsDef() &&  
-         DefOp.getOperandType() ==  MachineOperand::MO_MachineRegister) {
+      if (DefOp.opIsDef() &&
+          DefOp.getType() == MachineOperand::MO_MachineRegister) {
        
        // If the operand in DefInst is a def ...
-       
        bool DefEqUse = false;
        
        std::vector<MachineInstr *>::iterator UseIt = DefIt;
@@ -1617,8 +1616,8 @@ void UltraSparcRegInfo::OrderAddedInstrns(std::vector<MachineInstr*> &UnordVec,
          // for each inst (UseInst) that is below the DefInst do ...
          MachineOperand& UseOp = UseInst->getOperand(0);
          
-         if( ! UseOp.opIsDef() &&  
-             UseOp.getOperandType() == MachineOperand::MO_MachineRegister) {
+         if (!UseOp.opIsDef() &&  
+             UseOp.getType() == MachineOperand::MO_MachineRegister) {
            
            // if use is a register ...
            
@@ -1678,8 +1677,8 @@ void UltraSparcRegInfo::moveInst2OrdVec(std::vector<MachineInstr *> &OrdVec,
                                        PhyRegAlloc &PRA) const {
   MachineOperand& UseOp = UnordInst->getOperand(0);
 
-  if( ! UseOp.opIsDef() &&  
-      UseOp.getOperandType() ==  MachineOperand::MO_MachineRegister) {
+  if (!UseOp.opIsDef() &&
+      UseOp.getType() ==  MachineOperand::MO_MachineRegister) {
 
     // for the use of UnordInst, see whether there is a defining instr
     // before in the OrdVec
@@ -1695,7 +1694,7 @@ void UltraSparcRegInfo::moveInst2OrdVec(std::vector<MachineInstr *> &OrdVec,
        OrdInst->getOperand(OrdInst->getNumOperands()-1);
 
       if( DefOp.opIsDef() &&  
-         DefOp.getOperandType() == MachineOperand::MO_MachineRegister) {
+         DefOp.getType() == MachineOperand::MO_MachineRegister) {
 
        //cerr << "\nDefining Ord Inst: " <<  *OrdInst;