-//===-- UltraSparcSchedInfo.cpp -------------------------------------------===//
+//===-- SparcV9SchedInfo.cpp ----------------------------------------------===//
//
// The LLVM Compiler Infrastructure
//
//
//===----------------------------------------------------------------------===//
//
-// Describe the scheduling characteristics of the UltraSparc
+// Describe the scheduling characteristics of the UltraSparc IIi.
//
//===----------------------------------------------------------------------===//
-#include "SparcInternals.h"
+#include "SparcV9Internals.h"
+
+using namespace llvm;
/*---------------------------------------------------------------------------
Scheduling guidelines for SPARC IIi:
//---------------------------------------------------------------------------
-// const InstrClassRUsage SparcRUsageDesc[]
+// const InstrClassRUsage SparcV9RUsageDesc[]
//
// Purpose:
// Resource usage information for instruction in each scheduling class.
};
-static const InstrClassRUsage SparcRUsageDesc[] = {
+static const InstrClassRUsage SparcV9RUsageDesc[] = {
NoneClassRUsage,
IEUNClassRUsage,
IEU0ClassRUsage,
//---------------------------------------------------------------------------
-// const InstrIssueDelta SparcInstrIssueDeltas[]
+// const InstrIssueDelta SparcV9InstrIssueDeltas[]
//
// Purpose:
// Changes to issue restrictions information in InstrClassRUsage for
// instructions that differ from other instructions in their class.
//---------------------------------------------------------------------------
-static const InstrIssueDelta SparcInstrIssueDeltas[] = {
+static const InstrIssueDelta SparcV9InstrIssueDeltas[] = {
// opCode, isSingleIssue, breaksGroup, numBubbles
//{ V9::FLUSH, true, true, 9 },
//{ V9::FLUSHW, true, true, 9 },
//{ V9::ALIGNADDR, true, true, 0 },
- { V9::RETURNr, true, true, 0 },
- { V9::RETURNi, true, true, 0 },
//{ V9::DONE, true, true, 0 },
//{ V9::RETRY, true, true, 0 },
//{ V9::TCC, true, true, 0 },
//---------------------------------------------------------------------------
-// const InstrRUsageDelta SparcInstrUsageDeltas[]
+// const InstrRUsageDelta SparcV9InstrUsageDeltas[]
//
// Purpose:
// Changes to resource usage information in InstrClassRUsage for
// instructions that differ from other instructions in their class.
//---------------------------------------------------------------------------
-static const InstrRUsageDelta SparcInstrUsageDeltas[] = {
+static const InstrRUsageDelta SparcV9InstrUsageDeltas[] = {
// MachineOpCode, Resource, Start cycle, Num cycles
#ifdef EXPLICIT_BUBBLES_NEEDED
//
// MULScc inserts one bubble.
- // This means it breaks the current group (captured in UltraSparcSchedInfo)
+ // This means it breaks the current group (captured in UltraSparcV9SchedInfo)
// *and occupies all issue slots for the next cycle
//
//{ V9::MULScc, AllIssueSlots.rid, 2, 2-1 },
//---------------------------------------------------------------------------
-// class UltraSparcSchedInfo
+// class SparcV9SchedInfo
//
// Purpose:
// Scheduling information for the UltraSPARC.
//---------------------------------------------------------------------------
/*ctor*/
-UltraSparcSchedInfo::UltraSparcSchedInfo(const TargetMachine& tgt)
+SparcV9SchedInfo::SparcV9SchedInfo(const TargetMachine& tgt)
: TargetSchedInfo(tgt,
(unsigned int) SPARC_NUM_SCHED_CLASSES,
- SparcRUsageDesc,
- SparcInstrUsageDeltas,
- SparcInstrIssueDeltas,
- sizeof(SparcInstrUsageDeltas)/sizeof(InstrRUsageDelta),
- sizeof(SparcInstrIssueDeltas)/sizeof(InstrIssueDelta))
+ SparcV9RUsageDesc,
+ SparcV9InstrUsageDeltas,
+ SparcV9InstrIssueDeltas,
+ sizeof(SparcV9InstrUsageDeltas)/sizeof(InstrRUsageDelta),
+ sizeof(SparcV9InstrIssueDeltas)/sizeof(InstrIssueDelta))
{
maxNumIssueTotal = 4;
longestIssueConflict = 0; // computed from issuesGaps[]
- branchMispredictPenalty = 4; // 4 for SPARC IIi
- branchTargetUnknownPenalty = 2; // 2 for SPARC IIi
- l1DCacheMissPenalty = 8; // 7 or 9 for SPARC IIi
- l1ICacheMissPenalty = 8; // ? for SPARC IIi
-
- inOrderLoads = true; // true for SPARC IIi
- inOrderIssue = true; // true for SPARC IIi
- inOrderExec = false; // false for most architectures
- inOrderRetire= true; // true for most architectures
-
// must be called after above parameters are initialized.
initializeResources();
}
void
-UltraSparcSchedInfo::initializeResources()
+SparcV9SchedInfo::initializeResources()
{
// Compute TargetSchedInfo::instrRUsages and TargetSchedInfo::issueGaps
TargetSchedInfo::initializeResources();