-// $Id$
-//***************************************************************************
-// File:
-// Sparc.cpp
+//===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
//
-// Purpose:
-//
-// History:
-// 7/15/01 - Vikram Adve - Created
-//**************************************************************************/
-
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// Primary interface to machine description for the UltraSPARC. Primarily just
+// initializes machine-dependent parameters in class TargetMachine, and creates
+// machine-dependent subclasses for classes such as TargetInstrInfo.
+//
+//===----------------------------------------------------------------------===//
-#include "SparcInternals.h"
-#include "llvm/Target/Sparc.h"
-#include "llvm/CodeGen/InstrScheduling.h"
+#include "llvm/Function.h"
+#include "llvm/PassManager.h"
+#include "llvm/Assembly/PrintModulePass.h"
#include "llvm/CodeGen/InstrSelection.h"
+#include "llvm/CodeGen/InstrScheduling.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionInfo.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
-#include "llvm/CodeGen/RegisterAllocation.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Method.h"
-#include "llvm/PassManager.h"
-#include <iostream>
-using std::cerr;
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/Target/TargetMachineImpls.h"
+#include "llvm/Transforms/Scalar.h"
+#include "MappingInfo.h"
+#include "SparcInternals.h"
+#include "SparcTargetMachine.h"
+#include "Support/CommandLine.h"
+using namespace llvm;
+
+namespace llvm {
+
+static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
// Build the MachineInstruction Description Array...
-const MachineInstrDescriptor SparcMachineInstrDesc[] = {
+const TargetInstrDescriptor SparcMachineInstrDesc[] = {
#define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
{ OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
- NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS },
+ NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
+ ImplicitRegUseList, ImplicitRegUseList },
#include "SparcInstr.def"
};
-//----------------------------------------------------------------------------
-// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
-// that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
-//----------------------------------------------------------------------------
-//
-
-TargetMachine *allocateSparcTargetMachine() { return new UltraSparc(); }
-
-
//---------------------------------------------------------------------------
-// class InsertPrologEpilogCode
-//
-// Insert SAVE/RESTORE instructions for the method
-//
-// Insert prolog code at the unique method entry point.
-// Insert epilog code at each method exit point.
-// InsertPrologEpilog invokes these only if the method is not compiled
-// with the leaf method optimization.
-//
+// Command line options to control choice of code generation passes.
//---------------------------------------------------------------------------
-static MachineInstr* minstrVec[MAX_INSTR_PER_VMINSTR];
-
-class InsertPrologEpilogCode : public MethodPass {
- TargetMachine &Target;
-public:
- inline InsertPrologEpilogCode(TargetMachine &T) : Target(T) {}
- bool runOnMethod(Method *M) {
- MachineCodeForMethod &mcodeInfo = MachineCodeForMethod::get(M);
- if (!mcodeInfo.isCompiledAsLeafMethod()) {
- InsertPrologCode(M);
- InsertEpilogCode(M);
- }
- return false;
- }
-
- void InsertPrologCode(Method *M);
- void InsertEpilogCode(Method *M);
-};
-void InsertPrologEpilogCode::InsertPrologCode(Method* method)
-{
- BasicBlock* entryBB = method->getEntryNode();
- unsigned N = GetInstructionsForProlog(entryBB, Target, minstrVec);
- assert(N <= MAX_INSTR_PER_VMINSTR);
- MachineCodeForBasicBlock& bbMvec = entryBB->getMachineInstrVec();
- bbMvec.insert(bbMvec.begin(), minstrVec, minstrVec+N);
-}
+namespace {
+ cl::opt<bool> DisableSched("disable-sched",
+ cl::desc("Disable local scheduling pass"));
+ cl::opt<bool> DisablePeephole("disable-peephole",
+ cl::desc("Disable peephole optimization pass"));
-void InsertPrologEpilogCode::InsertEpilogCode(Method* method)
-{
- for (Method::iterator I=method->begin(), E=method->end(); I != E; ++I)
- if ((*I)->getTerminator()->getOpcode() == Instruction::Ret)
- {
- BasicBlock* exitBB = *I;
- unsigned N = GetInstructionsForEpilog(exitBB, Target, minstrVec);
-
- MachineCodeForBasicBlock& bbMvec = exitBB->getMachineInstrVec();
- MachineCodeForInstruction &termMvec =
- MachineCodeForInstruction::get(exitBB->getTerminator());
-
- // Remove the NOPs in the delay slots of the return instruction
- const MachineInstrInfo &mii = Target.getInstrInfo();
- unsigned numNOPs = 0;
- while (termMvec.back()->getOpCode() == NOP)
- {
- assert( termMvec.back() == bbMvec.back());
- termMvec.pop_back();
- bbMvec.pop_back();
- ++numNOPs;
- }
- assert(termMvec.back() == bbMvec.back());
-
- // Check that we found the right number of NOPs and have the right
- // number of instructions to replace them.
- unsigned ndelays = mii.getNumDelaySlots(termMvec.back()->getOpCode());
- assert(numNOPs == ndelays && "Missing NOPs in delay slots?");
- assert(N == ndelays && "Cannot use epilog code for delay slots?");
-
- // Append the epilog code to the end of the basic block.
- bbMvec.push_back(minstrVec[0]);
- }
-}
-
+ cl::opt<bool> EmitMappingInfo("enable-maps",
+ cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
-//---------------------------------------------------------------------------
-// class UltraSparcFrameInfo
-//
-// Purpose:
-// Interface to stack frame layout info for the UltraSPARC.
-// Starting offsets for each area of the stack frame are aligned at
-// a multiple of getStackFrameSizeAlignment().
-//---------------------------------------------------------------------------
+ cl::opt<bool> DisableStrip("disable-strip",
+ cl::desc("Do not strip the LLVM bytecode in executable"));
-int
-UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineCodeForMethod& ,
- bool& pos) const
-{
- pos = false; // static stack area grows downwards
- return StaticAreaOffsetFromFP;
+ cl::opt<bool> DumpInput("dump-input",
+ cl::desc("Print bytecode before code generation"),
+ cl::Hidden);
}
-int
-UltraSparcFrameInfo::getRegSpillAreaOffset(MachineCodeForMethod& mcInfo,
- bool& pos) const
-{
- pos = false; // static stack area grows downwards
- unsigned int autoVarsSize = mcInfo.getAutomaticVarsSize();
- if (int mod = autoVarsSize % getStackFrameSizeAlignment())
- autoVarsSize += (getStackFrameSizeAlignment() - mod);
- return StaticAreaOffsetFromFP - autoVarsSize;
-}
+} // End llvm namespace
-int
-UltraSparcFrameInfo::getTmpAreaOffset(MachineCodeForMethod& mcInfo,
- bool& pos) const
-{
- pos = false; // static stack area grows downwards
- unsigned int autoVarsSize = mcInfo.getAutomaticVarsSize();
- unsigned int spillAreaSize = mcInfo.getRegSpillsSize();
- int offset = autoVarsSize + spillAreaSize;
- if (int mod = offset % getStackFrameSizeAlignment())
- offset += (getStackFrameSizeAlignment() - mod);
- return StaticAreaOffsetFromFP - offset;
+SparcTargetMachine::SparcTargetMachine()
+ : TargetMachine("UltraSparc-Native", false),
+ schedInfo(*this),
+ regInfo(*this),
+ frameInfo(*this),
+ cacheInfo(*this),
+ jitInfo(*this) {
}
-int
-UltraSparcFrameInfo::getDynamicAreaOffset(MachineCodeForMethod& mcInfo,
- bool& pos) const
+// addPassesToEmitAssembly - This method controls the entire code generation
+// process for the ultra sparc.
+//
+bool
+SparcTargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
{
- // dynamic stack area grows downwards starting at top of opt-args area
- unsigned int optArgsSize = mcInfo.getMaxOptionalArgsSize();
- int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
- assert(offset % getStackFrameSizeAlignment() == 0);
- return offset;
-}
+ // The following 3 passes used to be inserted specially by llc.
+ // Replace malloc and free instructions with library calls.
+ PM.add(createLowerAllocationsPass());
+
+ // Strip all of the symbols from the bytecode so that it will be smaller...
+ if (!DisableStrip)
+ PM.add(createSymbolStrippingPass());
+ // FIXME: implement the switch instruction in the instruction selector.
+ PM.add(createLowerSwitchPass());
-//---------------------------------------------------------------------------
-// class UltraSparcMachine
-//
-// Purpose:
-// Primary interface to machine description for the UltraSPARC.
-// Primarily just initializes machine-dependent parameters in
-// class TargetMachine, and creates machine-dependent subclasses
-// for classes such as MachineInstrInfo.
-//
-//---------------------------------------------------------------------------
+ // FIXME: implement the invoke/unwind instructions!
+ PM.add(createLowerInvokePass());
+
+ // decompose multi-dimensional array references into single-dim refs
+ PM.add(createDecomposeMultiDimRefsPass());
+
+ // Construct and initialize the MachineFunction object for this fn.
+ PM.add(createMachineCodeConstructionPass(*this));
-UltraSparc::UltraSparc()
- : TargetMachine("UltraSparc-Native"),
- instrInfo(*this),
- schedInfo(*this),
- regInfo(*this),
- frameInfo(*this),
- cacheInfo(*this)
-{
- optSizeForSubWordData = 4;
- minMemOpWordSize = 8;
- maxAtomicMemOpWordSize = 8;
-}
+ //Insert empty stackslots in the stack frame of each function
+ //so %fp+offset-8 and %fp+offset-16 are empty slots now!
+ PM.add(createStackSlotsPass(*this));
+ // Specialize LLVM code for this target machine
+ PM.add(createPreSelectionPass(*this));
+ // Run basic dataflow optimizations on LLVM code
+ PM.add(createReassociatePass());
+ PM.add(createLICMPass());
+ PM.add(createGCSEPass());
+ // If LLVM dumping after transformations is requested, add it to the pipeline
+ if (DumpInput)
+ PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
+ &std::cerr));
-//===---------------------------------------------------------------------===//
-// GenerateCodeForTarget Pass
-//
-// Native code generation for a specified target.
-//===---------------------------------------------------------------------===//
-
-class ConstructMachineCodeForMethod : public MethodPass {
- TargetMachine &Target;
-public:
- inline ConstructMachineCodeForMethod(TargetMachine &T) : Target(T) {}
- bool runOnMethod(Method *M) {
- MachineCodeForMethod::construct(M, Target);
- return false;
- }
-};
+ PM.add(createInstructionSelectionPass(*this));
-class InstructionSelection : public MethodPass {
- TargetMachine &Target;
-public:
- inline InstructionSelection(TargetMachine &T) : Target(T) {}
- bool runOnMethod(Method *M) {
- if (SelectInstructionsForMethod(M, Target))
- cerr << "Instr selection failed for method " << M->getName() << "\n";
- return false;
- }
-};
+ if (!DisableSched)
+ PM.add(createInstructionSchedulingWithSSAPass(*this));
-class InstructionScheduling : public MethodPass {
- TargetMachine &Target;
-public:
- inline InstructionScheduling(TargetMachine &T) : Target(T) {}
- bool runOnMethod(Method *M) {
- if (ScheduleInstructionsWithSSA(M, Target))
- cerr << "Instr scheduling failed for method " << M->getName() << "\n\n";
- return false;
- }
-};
+ PM.add(getRegisterAllocator(*this));
-struct FreeMachineCodeForMethod : public MethodPass {
- static void freeMachineCode(Instruction *I) {
- MachineCodeForInstruction::destroy(I);
- }
-
- bool runOnMethod(Method *M) {
- for_each(M->inst_begin(), M->inst_end(), freeMachineCode);
- // Don't destruct MachineCodeForMethod - The global printer needs it
- //MachineCodeForMethod::destruct(M);
- return false;
- }
-};
+ PM.add(createPrologEpilogInsertionPass());
+ if (!DisablePeephole)
+ PM.add(createPeepholeOptsPass(*this));
+ if (EmitMappingInfo)
+ PM.add(getMappingInfoAsmPrinterPass(Out));
-// addPassesToEmitAssembly - This method controls the entire code generation
-// process for the ultra sparc.
+ // Output assembly language to the .s file. Assembly emission is split into
+ // two parts: Function output and Global value output. This is because
+ // function output is pipelined with all of the rest of code generation stuff,
+ // allowing machine code representations for functions to be free'd after the
+ // function has been emitted.
+ //
+ PM.add(createAsmPrinterPass(Out, *this));
+ PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
+
+ // Emit bytecode to the assembly file into its special section next
+ if (EmitMappingInfo)
+ PM.add(createBytecodeAsmPrinterPass(Out));
+
+ return false;
+}
+
+// addPassesToJITCompile - This method controls the JIT method of code
+// generation for the UltraSparc.
//
-void UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
- // Construct and initialize the MachineCodeForMethod object for this method.
- PM.add(new ConstructMachineCodeForMethod(*this));
+void SparcJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
+ const TargetData &TD = TM.getTargetData();
- PM.add(new InstructionSelection(*this));
+ PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
+ TD.getPointerAlignment(), TD.getDoubleAlignment()));
- //PM.add(new InstructionScheduling(*this));
+ // Replace malloc and free instructions with library calls.
+ // Do this after tracing until lli implements these lib calls.
+ // For now, it will emulate malloc and free internally.
+ PM.add(createLowerAllocationsPass());
- PM.add(new RegisterAllocation(*this));
-
- //PM.add(new OptimizeLeafProcedures());
- //PM.add(new DeleteFallThroughBranches());
- //PM.add(new RemoveChainedBranches()); // should be folded with previous
- //PM.add(new RemoveRedundantOps()); // operations with %g0, NOP, etc.
-
- PM.add(new InsertPrologEpilogCode(*this));
+ // FIXME: implement the switch instruction in the instruction selector.
+ PM.add(createLowerSwitchPass());
+
+ // FIXME: implement the invoke/unwind instructions!
+ PM.add(createLowerInvokePass());
+
+ // decompose multi-dimensional array references into single-dim refs
+ PM.add(createDecomposeMultiDimRefsPass());
- // Output assembly language to the .s file. Assembly emission is split into
- // two parts: Method output and Global value output. This is because method
- // output is pipelined with all of the rest of code generation stuff,
- // allowing machine code representations for methods to be free'd after the
- // method has been emitted.
- //
- PM.add(getMethodAsmPrinterPass(PM, Out));
- PM.add(new FreeMachineCodeForMethod()); // Free stuff no longer needed
+ // Construct and initialize the MachineFunction object for this fn.
+ PM.add(createMachineCodeConstructionPass(TM));
+
+ // Specialize LLVM code for this target machine and then
+ // run basic dataflow optimizations on LLVM code.
+ PM.add(createPreSelectionPass(TM));
+ // Run basic dataflow optimizations on LLVM code
+ PM.add(createReassociatePass());
+
+ // FIXME: these passes crash the FunctionPassManager when being added...
+ //PM.add(createLICMPass());
+ //PM.add(createGCSEPass());
+
+ PM.add(createInstructionSelectionPass(TM));
+
+ PM.add(getRegisterAllocator(TM));
+ PM.add(createPrologEpilogInsertionPass());
+
+ if (!DisablePeephole)
+ PM.add(createPeepholeOptsPass(TM));
+}
+
+//----------------------------------------------------------------------------
+// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
+// that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
+//----------------------------------------------------------------------------
- // Emit Module level assembly after all of the methods have been processed.
- PM.add(getModuleAsmPrinterPass(PM, Out));
+TargetMachine *llvm::allocateSparcTargetMachine(const Module &M) {
+ return new SparcTargetMachine();
}
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