-//===- SparcV9_F2.td - Format 2 instructions: Sparc V9 Target -------------===//
+//===- SparcV9_F2.td - SparcV9 Format 2 instructions -------*- tablegen -*-===//
//
// The LLVM Compiler Infrastructure
//
class F2_2<bits<4> cond, string name> : F2_br { // Format 2.2 instructions
bits<22> disp;
- bit annul = 0; // currently unused by Sparc backend
+ bit annul = 0; // currently unused by SparcV9 backend
let Name = name;
let Inst{29} = annul;
bits<2> cc;
bits<19> disp;
bit predict = 1;
- bit annul = 0; // currently unused by Sparc backend
+ bit annul = 0; // currently unused by SparcV9 backend
let Name = name;
let Inst{29} = annul;
bits<5> rs1;
bits<16> disp;
bit predict = 1;
- bit annul = 0; // currently unused by Sparc backend
+ bit annul = 0; // currently unused by SparcV9 backend
let Name = name;
let Inst{29} = annul;