Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.

[oota-llvm.git] / lib / Target / SystemZ / SystemZSubtarget.cpp

diff --git a/lib/Target/SystemZ/SystemZSubtarget.cpp b/lib/Target/SystemZ/SystemZSubtarget.cpp
index 4388109fb1149407f1e00e21545967da9cc9b3b2..cfd3324aadb77b016471a0626da4f7f8c3c807dc 100644 (file)
--- a/lib/Target/SystemZ/SystemZSubtarget.cpp
+++ b/lib/Target/SystemZ/SystemZSubtarget.cpp
@@ -1,4 +1,4 @@
-//===- SystemZSubtarget.cpp - SystemZ Subtarget Information -------*- C++ -*-=//
+//===-- SystemZSubtarget.cpp - SystemZ subtarget information --------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -6,49 +6,51 @@
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
-//
-// This file implements the SystemZ specific subclass of TargetSubtargetInfo.
-//
-//===----------------------------------------------------------------------===//
 
 #include "SystemZSubtarget.h"
-#include "SystemZ.h"
-#include "llvm/GlobalValue.h"
-#include "llvm/Target/TargetMachine.h"
+#include "llvm/IR/GlobalValue.h"
 
-#define GET_SUBTARGETINFO_CTOR
-#define GET_SUBTARGETINFO_MC_DESC
 #define GET_SUBTARGETINFO_TARGET_DESC
+#define GET_SUBTARGETINFO_CTOR
 #include "SystemZGenSubtargetInfo.inc"
 
 using namespace llvm;
 
-SystemZSubtarget::SystemZSubtarget(const std::string &TT, 
+SystemZSubtarget::SystemZSubtarget(const std::string &TT,
                                    const std::string &CPU,
-                                   const std::string &FS):
-  SystemZGenSubtargetInfo(), HasZ10Insts(false) {
+                                   const std::string &FS)
+  : SystemZGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT) {
   std::string CPUName = CPU;
   if (CPUName.empty())
-    CPUName = "z9";
+    CPUName = "z10";
 
   // Parse features string.
-  ParseSubtargetFeatures(FS, CPUName);
+  ParseSubtargetFeatures(CPUName, FS);
 }
 
-/// True if accessing the GV requires an extra load.
-bool SystemZSubtarget::GVRequiresExtraLoad(const GlobalValue* GV,
-                                           const TargetMachine& TM,
-                                           bool isDirectCall) const {
-  if (TM.getRelocationModel() == Reloc::PIC_) {
-    // Extra load is needed for all externally visible.
-    if (isDirectCall)
-      return false;
-
-    if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
-      return false;
-
+// Return true if GV binds locally under reloc model RM.
+static bool bindsLocally(const GlobalValue *GV, Reloc::Model RM) {
+  // For non-PIC, all symbols bind locally.
+  if (RM == Reloc::Static)
     return true;
-  }
 
+  return GV->hasLocalLinkage() || !GV->hasDefaultVisibility();
+}
+
+bool SystemZSubtarget::isPC32DBLSymbol(const GlobalValue *GV,
+                                       Reloc::Model RM,
+                                       CodeModel::Model CM) const {
+  // PC32DBL accesses require the low bit to be clear.  Note that a zero
+  // value selects the default alignment and is therefore OK.
+  if (GV->getAlignment() == 1)
+    return false;
+
+  // For the small model, all locally-binding symbols are in range.
+  if (CM == CodeModel::Small)
+    return bindsLocally(GV, RM);
+
+  // For Medium and above, assume that the symbol is not within the 4GB range.
+  // Taking the address of locally-defined text would be OK, but that
+  // case isn't easy to detect.
   return false;
 }