//
include "../TargetSchedule.td"
+class Predicate; // Forward def
//===----------------------------------------------------------------------===//
// Instruction set description - These classes correspond to the C++ classes in
list<Register> Uses = []; // Default to using no non-operand registers
list<Register> Defs = []; // Default to modifying no non-operand registers
+ // Predicates - List of predicates which will be turned into isel matching
+ // code.
+ list<Predicate> Predicates = [];
+
// These bits capture information about the high-level semantics of the
// instruction.
bit isReturn = 0; // Is this instruction a return instruction?
bit hasDelaySlot = 0; // Does this instruction have an delay slot?
bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.
bit hasCtrlDep = 0; // Does this instruction r/w ctrl-flow chains?
+ bit noResults = 0; // Does this instruction produce no results?
- InstrItinClass Itinerary; // Execution steps used for scheduling.
+ InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling.
+}
+
+/// Predicates - These are extra conditionals which are turned into instruction
+/// selector matching code. Currently each predicate is just a string.
+class Predicate<string cond> {
+ string CondString = cond;
}
+class Requires<list<Predicate> preds> {
+ list<Predicate> Predicates = preds;
+}
/// ops definition - This is just a simple marker used to identify the operands
/// list for an instruction. This should be used like this:
// which are global to the the target machine.
//
class InstrInfo {
- Instruction PHIInst;
-
// If the target wants to associate some target-specific information with each
// instruction, it should provide these two lists to indicate how to assemble
// the target specific information into the 32 bits available.
bit isLittleEndianEncoding = 0;
}
+// Standard Instructions.
+def PHI : Instruction {
+ let OperandList = (ops variable_ops);
+ let AsmString = "PHINODE";
+}
+def INLINEASM : Instruction {
+ let OperandList = (ops variable_ops);
+ let AsmString = "";
+}
+
//===----------------------------------------------------------------------===//
// AsmWriter - This class can be implemented by targets that need to customize
// the format of the .s file writer.
//===----------------------------------------------------------------------===//
// SubtargetFeature - A characteristic of the chip set.
//
-class SubtargetFeature<string n, string t, string a, string d> {
+class SubtargetFeature<string n, string a, string v, string d> {
// Name - Feature name. Used by command line (-mattr=) to determine the
// appropriate target chip.
//
string Name = n;
- // Type - Type of attribute to be set by feature.
- //
- string Type = t;
-
// Attribute - Attribute to be set by feature.
//
string Attribute = a;
+ // Value - Value the attribute to be set to by feature.
+ //
+ string Value = v;
+
// Desc - Feature description. Used by command line (-mattr=) to display help
// information.
//