bug 122:

[oota-llvm.git] / lib / Target / Target.td

diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 7ee39e366b68a13f3389a27f63e57c516b7d974b..c05d3faaad58f323608de01c0bcb1fcd73f88e2f 100644 (file)
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -1,4 +1,11 @@
 //===- Target.td - Target Independent TableGen interface --------*- C++ -*-===//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
 //
 // This file defines the target-independent interfaces which should be
 // implemented by each target which is using a TableGen based code generator.
@@ -18,6 +25,7 @@ class ValueType<int size, int value> {
   int Value = value;
 }
 
+def OtherVT: ValueType<0  ,  0>;   // "Other" value
 def i1     : ValueType<1  ,  1>;   // One bit boolean value
 def i8     : ValueType<8  ,  2>;   // 8-bit integer value
 def i16    : ValueType<16 ,  3>;   // 16-bit integer value
@@ -86,6 +94,10 @@ class RegisterClass<ValueType regType, int alignment, list<Register> regList> {
   // Methods - This member can be used to insert arbitrary code into a generated
   // register class.   The normal usage of this is to overload virtual methods.
   code Methods = [{}];
+
+  // isDummyClass - If this is set to true, this register class is not really
+  // part of the target, it is just used for other purposes.
+  bit isDummyClass = 0;
 }
 
 
@@ -156,11 +168,13 @@ class Target {
 // DAG node definitions used by the instruction selector...
 //
 class DagNodeValType;
+def DNVT_any   : DagNodeValType;  // No constraint on tree node
 def DNVT_void  : DagNodeValType;  // Tree node always returns void
 def DNVT_val   : DagNodeValType;  // A non-void type
 def DNVT_arg0  : DagNodeValType;  // Tree node returns same type as Arg0
 def DNVT_arg1  : DagNodeValType;  // Tree node returns same type as Arg1
 def DNVT_ptr   : DagNodeValType;  // The target pointer type
+def DNVT_i8    : DagNodeValType;  // Always have an i8 value
 
 class DagNode<DagNodeValType ret, list<DagNodeValType> args> {
   DagNodeValType RetType = ret;
@@ -176,11 +190,19 @@ class BuiltinDagNode<DagNodeValType Ret, list<DagNodeValType> Args,
 }
 
 // Magic nodes...
-def set     : DagNode<DNVT_void, [DNVT_val, DNVT_arg0]>;
+def Void       : RegisterClass<isVoid,0,[]> { let isDummyClass = 1; }
+def set        : DagNode<DNVT_void, [DNVT_val, DNVT_arg0]>;
+def chain      : BuiltinDagNode<DNVT_void, [DNVT_void, DNVT_void], "ChainNode">;
+def blockchain : BuiltinDagNode<DNVT_void, [DNVT_void, DNVT_void],
+                                "BlockChainNode">;
+def ChainExpander      : Expander<(chain Void, Void), []>;
+def BlockChainExpander : Expander<(blockchain Void, Void), []>;
+
 
 // Terminals...
-def imm : BuiltinDagNode<DNVT_val, [], "Constant">;
-def frameidx : BuiltinDagNode<DNVT_ptr, [], "FrameIndex">;
+def imm        : BuiltinDagNode<DNVT_val, [], "Constant">;
+def frameidx   : BuiltinDagNode<DNVT_ptr, [], "FrameIndex">;
+def basicblock : BuiltinDagNode<DNVT_ptr, [], "BasicBlock">;
 
 // Arithmetic...
 def plus    : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "Plus">;
@@ -194,6 +216,13 @@ def and     : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "And">;
 def or      : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "Or">;
 def xor     : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "Xor">;
 
+// Comparisons...
+def seteq   : BuiltinDagNode<DNVT_i8  , [DNVT_arg1, DNVT_arg0], "SetEQ">;
+def setne   : BuiltinDagNode<DNVT_i8  , [DNVT_arg1, DNVT_arg0], "SetNE">;
+def setlt   : BuiltinDagNode<DNVT_i8  , [DNVT_arg1, DNVT_arg0], "SetLT">;
+def setle   : BuiltinDagNode<DNVT_i8  , [DNVT_arg1, DNVT_arg0], "SetLE">;
+def setgt   : BuiltinDagNode<DNVT_i8  , [DNVT_arg1, DNVT_arg0], "SetGT">;
+def setge   : BuiltinDagNode<DNVT_i8  , [DNVT_arg1, DNVT_arg0], "SetGE">;
 
 def load    : BuiltinDagNode<DNVT_val, [DNVT_ptr], "Load">;
 //def store   : BuiltinDagNode<DNVT_Void, [DNVT_ptr, DNVT_val]>;
@@ -201,6 +230,12 @@ def load    : BuiltinDagNode<DNVT_val, [DNVT_ptr], "Load">;
 // Other...
 def ret     : BuiltinDagNode<DNVT_void, [DNVT_val], "Ret">;
 def retvoid : BuiltinDagNode<DNVT_void, [], "RetVoid">;
+def br      : BuiltinDagNode<DNVT_void, [DNVT_ptr], "Br">;
+def brcond  : BuiltinDagNode<DNVT_void, [DNVT_i8, DNVT_ptr, DNVT_ptr],
+                             "BrCond">;
+
+def unspec1 : BuiltinDagNode<DNVT_any , [DNVT_val], "Unspec1">;
+def unspec2 : BuiltinDagNode<DNVT_any , [DNVT_val, DNVT_val], "Unspec2">;
 
 //===----------------------------------------------------------------------===//
 // DAG nonterminals definitions used by the instruction selector...