Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.

[oota-llvm.git] / lib / Target / TargetInstrInfo.cpp

diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp
index 10a5cdb6247a9fb44aa02a660203960c72d6f2e1..ceaea0c2027ce20b6605eb68a9689292752dd6d2 100644 (file)
--- a/lib/Target/TargetInstrInfo.cpp
+++ b/lib/Target/TargetInstrInfo.cpp
@@ -12,23 +12,11 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Constant.h"
 #include "llvm/DerivedTypes.h"
 using namespace llvm;
 
-/// findTiedToSrcOperand - Returns the operand that is tied to the specified
-/// dest operand. Returns -1 if there isn't one.
-int TargetInstrDesc::findTiedToSrcOperand(unsigned OpNum) const {
-  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
-    if (i == OpNum)
-      continue;
-    if (getOperandConstraint(i, TOI::TIED_TO) == (int)OpNum)
-      return i;
-  }
-  return -1;
-}
-
-
 TargetInstrInfo::TargetInstrInfo(const TargetInstrDesc* Desc,
                                  unsigned numOpcodes)
   : Descriptors(Desc), NumOpcodes(numOpcodes) {
@@ -48,3 +36,15 @@ bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
     return true;
   return !isPredicated(MI);
 }
+
+/// getInstrOperandRegClass - Return register class of the operand of an
+/// instruction of the specified TargetInstrDesc.
+const TargetRegisterClass*
+llvm::getInstrOperandRegClass(const TargetRegisterInfo *TRI,
+                        const TargetInstrDesc &II, unsigned Op) {
+  if (Op >= II.getNumOperands())
+    return NULL;
+  if (II.OpInfo[Op].isLookupPtrRegClass())
+    return TRI->getPointerRegClass();
+  return TRI->getRegClass(II.OpInfo[Op].RegClass);
+}