make -print-machineinstrs work for both SparcV9 and X86

[oota-llvm.git] / lib / Target / TargetMachine.cpp

diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index 24788e3c4d9d153409cc92063ab408c36c154c0d..82778d9b8ae105a2ae7c56a758e267f731112459 100644 (file)
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -1,25 +1,59 @@
 //===-- TargetMachine.cpp - General Target Information ---------------------==//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
 //
 // This file describes the general parts of a Target machine.
-// This file also implements TargetCacheInfo.
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetCacheInfo.h"
 #include "llvm/Type.h"
+#include "llvm/IntrinsicLowering.h"
+#include "Support/CommandLine.h"
+using namespace llvm;
 
 //---------------------------------------------------------------------------
-// class TargetMachine
-// 
-// Purpose:
-//   Machine description.
-// 
+// Command-line options that tend to be useful on more than one back-end.
+//
+
+namespace llvm { 
+  bool PrintMachineCode;
+};
+namespace {
+  cl::opt<bool, true> PrintCode("print-machineinstrs",
+    cl::desc("Print generated machine code"),
+    cl::location(PrintMachineCode), cl::init(false));
+};
+
 //---------------------------------------------------------------------------
+// TargetMachine Class
+//
+TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
+                             bool LittleEndian,
+                             unsigned char PtrSize, unsigned char PtrAl,
+                             unsigned char DoubleAl, unsigned char FloatAl,
+                             unsigned char LongAl, unsigned char IntAl,
+                             unsigned char ShortAl, unsigned char ByteAl)
+  : Name(name), DataLayout(name, LittleEndian,
+                           PtrSize, PtrAl, DoubleAl, FloatAl, LongAl,
+                           IntAl, ShortAl, ByteAl) {
+  IL = il ? il : new DefaultIntrinsicLowering();
+}
+TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
+                             const Module &M)
+  : Name(name), DataLayout(name, &M) {
+  IL = il ? il : new DefaultIntrinsicLowering();
+}
 
+TargetMachine::~TargetMachine() {
+  delete IL;
+}
 
-// function TargetMachine::findOptimalStorageSize 
-// 
 unsigned TargetMachine::findOptimalStorageSize(const Type *Ty) const {
   // All integer types smaller than ints promote to 4 byte integers.
   if (Ty->isIntegral() && Ty->getPrimitiveSize() < 4)
@@ -27,18 +61,3 @@ unsigned TargetMachine::findOptimalStorageSize(const Type *Ty) const {
 
   return DataLayout.getTypeSize(Ty);
 }
-
-
-//---------------------------------------------------------------------------
-// class TargetCacheInfo 
-// 
-// Purpose:
-//   Describes properties of the target cache architecture.
-//---------------------------------------------------------------------------
-
-void TargetCacheInfo::Initialize() {
-  numLevels = 2;
-  cacheLineSizes.push_back(16);  cacheLineSizes.push_back(32); 
-  cacheSizes.push_back(1 << 15); cacheSizes.push_back(1 << 20);
-  cacheAssoc.push_back(1);       cacheAssoc.push_back(4);
-}