Make all pointers to TargetRegisterClass const since they are all pointers to static...

[oota-llvm.git] / lib / Target / TargetMachine.cpp

diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index 24788e3c4d9d153409cc92063ab408c36c154c0d..b4969ca011b71b2c4c016b49917eb64d5f2f5498 100644 (file)
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -1,44 +1,108 @@
 //===-- TargetMachine.cpp - General Target Information ---------------------==//
 //
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
 // This file describes the general parts of a Target machine.
-// This file also implements TargetCacheInfo.
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/MC/MCAsmInfo.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetCacheInfo.h"
-#include "llvm/Type.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Support/CommandLine.h"
+using namespace llvm;
 
 //---------------------------------------------------------------------------
-// class TargetMachine
-// 
-// Purpose:
-//   Machine description.
-// 
+// Command-line options that tend to be useful on more than one back-end.
+//
+
+namespace llvm {
+  bool HasDivModLibcall;
+  bool AsmVerbosityDefault(false);
+}
+
+static cl::opt<bool>
+DataSections("fdata-sections",
+  cl::desc("Emit data into separate sections"),
+  cl::init(false));
+static cl::opt<bool>
+FunctionSections("ffunction-sections",
+  cl::desc("Emit functions into separate sections"),
+  cl::init(false));
+
 //---------------------------------------------------------------------------
+// TargetMachine Class
+//
 
+TargetMachine::TargetMachine(const Target &T,
+                             StringRef TT, StringRef CPU, StringRef FS,
+                             const TargetOptions &Options)
+  : TheTarget(T), TargetTriple(TT), TargetCPU(CPU), TargetFS(FS),
+    CodeGenInfo(0), AsmInfo(0),
+    MCRelaxAll(false),
+    MCNoExecStack(false),
+    MCSaveTempLabels(false),
+    MCUseLoc(true),
+    MCUseCFI(true),
+    MCUseDwarfDirectory(false),
+    Options(Options) {
+}
 
-// function TargetMachine::findOptimalStorageSize 
-// 
-unsigned TargetMachine::findOptimalStorageSize(const Type *Ty) const {
-  // All integer types smaller than ints promote to 4 byte integers.
-  if (Ty->isIntegral() && Ty->getPrimitiveSize() < 4)
-    return 4;
+TargetMachine::~TargetMachine() {
+  delete CodeGenInfo;
+  delete AsmInfo;
+}
 
-  return DataLayout.getTypeSize(Ty);
+/// getRelocationModel - Returns the code generation relocation model. The
+/// choices are static, PIC, and dynamic-no-pic, and target default.
+Reloc::Model TargetMachine::getRelocationModel() const {
+  if (!CodeGenInfo)
+    return Reloc::Default;
+  return CodeGenInfo->getRelocationModel();
 }
 
+/// getCodeModel - Returns the code model. The choices are small, kernel,
+/// medium, large, and target default.
+CodeModel::Model TargetMachine::getCodeModel() const {
+  if (!CodeGenInfo)
+    return CodeModel::Default;
+  return CodeGenInfo->getCodeModel();
+}
 
-//---------------------------------------------------------------------------
-// class TargetCacheInfo 
-// 
-// Purpose:
-//   Describes properties of the target cache architecture.
-//---------------------------------------------------------------------------
+/// getOptLevel - Returns the optimization level: None, Less,
+/// Default, or Aggressive.
+CodeGenOpt::Level TargetMachine::getOptLevel() const {
+  if (!CodeGenInfo)
+    return CodeGenOpt::Default;
+  return CodeGenInfo->getOptLevel();
+}
+
+bool TargetMachine::getAsmVerbosityDefault() {
+  return AsmVerbosityDefault;
+}
 
-void TargetCacheInfo::Initialize() {
-  numLevels = 2;
-  cacheLineSizes.push_back(16);  cacheLineSizes.push_back(32); 
-  cacheSizes.push_back(1 << 15); cacheSizes.push_back(1 << 20);
-  cacheAssoc.push_back(1);       cacheAssoc.push_back(4);
+void TargetMachine::setAsmVerbosityDefault(bool V) {
+  AsmVerbosityDefault = V;
 }
+
+bool TargetMachine::getFunctionSections() {
+  return FunctionSections;
+}
+
+bool TargetMachine::getDataSections() {
+  return DataSections;
+}
+
+void TargetMachine::setFunctionSections(bool V) {
+  FunctionSections = V;
+}
+
+void TargetMachine::setDataSections(bool V) {
+  DataSections = V;
+}
+