//===-- TargetMachine.cpp - General Target Information ---------------------==//
//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
// This file describes the general parts of a Target machine.
//
//===----------------------------------------------------------------------===//
-#include "llvm/Target/SchedInfo.h"
-#include "llvm/Target/Machine.h"
-#include "llvm/DerivedTypes.h"
-
-// External object describing the machine instructions
-// Initialized only when the TargetMachine class is created
-// and reset when that class is destroyed.
-//
-const MachineInstrDescriptor* TargetInstrDescriptors = NULL;
-
-resourceId_t MachineResource::nextId = 0;
-
-static cycles_t ComputeMinGap (const InstrRUsage& fromRU,
- const InstrRUsage& toRU);
-
-static bool RUConflict (const vector<resourceId_t>& fromRVec,
- const vector<resourceId_t>& fromRVec);
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Support/CommandLine.h"
+using namespace llvm;
//---------------------------------------------------------------------------
-// class TargetMachine
-//
-// Purpose:
-// Machine description.
-//
-//---------------------------------------------------------------------------
-
+// Command-line options that tend to be useful on more than one back-end.
+//
-// function TargetMachine::findOptimalStorageSize
-//
-// Purpose:
-// This default implementation assumes that all sub-word data items use
-// space equal to optSizeForSubWordData, and all other primitive data
-// items use space according to the type.
-//
-unsigned int TargetMachine::findOptimalStorageSize(const Type* ty) const {
- switch(ty->getPrimitiveID()) {
- case Type::BoolTyID:
- case Type::UByteTyID:
- case Type::SByteTyID:
- case Type::UShortTyID:
- case Type::ShortTyID:
- return optSizeForSubWordData;
-
- default:
- return DataLayout.getTypeSize(ty);
- }
+namespace llvm {
+ bool LessPreciseFPMADOption;
+ bool PrintMachineCode;
+ bool NoFramePointerElim;
+ bool NoFramePointerElimNonLeaf;
+ bool NoExcessFPPrecision;
+ bool UnsafeFPMath;
+ bool NoInfsFPMath;
+ bool NoNaNsFPMath;
+ bool HonorSignDependentRoundingFPMathOption;
+ bool UseSoftFloat;
+ FloatABI::ABIType FloatABIType;
+ bool NoImplicitFloat;
+ bool NoZerosInBSS;
+ bool JITExceptionHandling;
+ bool JITEmitDebugInfo;
+ bool JITEmitDebugInfoToDisk;
+ bool GuaranteedTailCallOpt;
+ unsigned StackAlignmentOverride;
+ bool RealignStack;
+ bool DisableJumpTables;
+ bool StrongPHIElim;
+ bool HasDivModLibcall;
+ bool AsmVerbosityDefault(false);
+ bool EnableSegmentedStacks;
}
+static cl::opt<bool, true>
+PrintCode("print-machineinstrs",
+ cl::desc("Print generated machine code"),
+ cl::location(PrintMachineCode), cl::init(false));
+static cl::opt<bool, true>
+DisableFPElim("disable-fp-elim",
+ cl::desc("Disable frame pointer elimination optimization"),
+ cl::location(NoFramePointerElim),
+ cl::init(false));
+static cl::opt<bool, true>
+DisableFPElimNonLeaf("disable-non-leaf-fp-elim",
+ cl::desc("Disable frame pointer elimination optimization for non-leaf funcs"),
+ cl::location(NoFramePointerElimNonLeaf),
+ cl::init(false));
+static cl::opt<bool, true>
+DisableExcessPrecision("disable-excess-fp-precision",
+ cl::desc("Disable optimizations that may increase FP precision"),
+ cl::location(NoExcessFPPrecision),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableFPMAD("enable-fp-mad",
+ cl::desc("Enable less precise MAD instructions to be generated"),
+ cl::location(LessPreciseFPMADOption),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableUnsafeFPMath("enable-unsafe-fp-math",
+ cl::desc("Enable optimizations that may decrease FP precision"),
+ cl::location(UnsafeFPMath),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableNoInfsFPMath("enable-no-infs-fp-math",
+ cl::desc("Enable FP math optimizations that assume no +-Infs"),
+ cl::location(NoInfsFPMath),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableNoNaNsFPMath("enable-no-nans-fp-math",
+ cl::desc("Enable FP math optimizations that assume no NaNs"),
+ cl::location(NoNaNsFPMath),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableHonorSignDependentRoundingFPMath("enable-sign-dependent-rounding-fp-math",
+ cl::Hidden,
+ cl::desc("Force codegen to assume rounding mode can change dynamically"),
+ cl::location(HonorSignDependentRoundingFPMathOption),
+ cl::init(false));
+static cl::opt<bool, true>
+GenerateSoftFloatCalls("soft-float",
+ cl::desc("Generate software floating point library calls"),
+ cl::location(UseSoftFloat),
+ cl::init(false));
+static cl::opt<llvm::FloatABI::ABIType, true>
+FloatABIForCalls("float-abi",
+ cl::desc("Choose float ABI type"),
+ cl::location(FloatABIType),
+ cl::init(FloatABI::Default),
+ cl::values(
+ clEnumValN(FloatABI::Default, "default",
+ "Target default float ABI type"),
+ clEnumValN(FloatABI::Soft, "soft",
+ "Soft float ABI (implied by -soft-float)"),
+ clEnumValN(FloatABI::Hard, "hard",
+ "Hard float ABI (uses FP registers)"),
+ clEnumValEnd));
+static cl::opt<bool, true>
+DontPlaceZerosInBSS("nozero-initialized-in-bss",
+ cl::desc("Don't place zero-initialized symbols into bss section"),
+ cl::location(NoZerosInBSS),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableJITExceptionHandling("jit-enable-eh",
+ cl::desc("Emit exception handling information"),
+ cl::location(JITExceptionHandling),
+ cl::init(false));
+// In debug builds, make this default to true.
+#ifdef NDEBUG
+#define EMIT_DEBUG false
+#else
+#define EMIT_DEBUG true
+#endif
+static cl::opt<bool, true>
+EmitJitDebugInfo("jit-emit-debug",
+ cl::desc("Emit debug information to debugger"),
+ cl::location(JITEmitDebugInfo),
+ cl::init(EMIT_DEBUG));
+#undef EMIT_DEBUG
+static cl::opt<bool, true>
+EmitJitDebugInfoToDisk("jit-emit-debug-to-disk",
+ cl::Hidden,
+ cl::desc("Emit debug info objfiles to disk"),
+ cl::location(JITEmitDebugInfoToDisk),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableGuaranteedTailCallOpt("tailcallopt",
+ cl::desc("Turn fastcc calls into tail calls by (potentially) changing ABI."),
+ cl::location(GuaranteedTailCallOpt),
+ cl::init(false));
+static cl::opt<unsigned, true>
+OverrideStackAlignment("stack-alignment",
+ cl::desc("Override default stack alignment"),
+ cl::location(StackAlignmentOverride),
+ cl::init(0));
+static cl::opt<bool, true>
+EnableRealignStack("realign-stack",
+ cl::desc("Realign stack if needed"),
+ cl::location(RealignStack),
+ cl::init(true));
+static cl::opt<bool, true>
+DisableSwitchTables(cl::Hidden, "disable-jump-tables",
+ cl::desc("Do not generate jump tables."),
+ cl::location(DisableJumpTables),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableStrongPHIElim(cl::Hidden, "strong-phi-elim",
+ cl::desc("Use strong PHI elimination."),
+ cl::location(StrongPHIElim),
+ cl::init(false));
+static cl::opt<std::string>
+TrapFuncName("trap-func", cl::Hidden,
+ cl::desc("Emit a call to trap function rather than a trap instruction"),
+ cl::init(""));
+static cl::opt<bool>
+DataSections("fdata-sections",
+ cl::desc("Emit data into separate sections"),
+ cl::init(false));
+static cl::opt<bool>
+FunctionSections("ffunction-sections",
+ cl::desc("Emit functions into separate sections"),
+ cl::init(false));
+static cl::opt<bool, true>
+SegmentedStacks("segmented-stacks",
+ cl::desc("Use segmented stacks if possible."),
+ cl::location(EnableSegmentedStacks),
+ cl::init(false));
+
//---------------------------------------------------------------------------
-// class MachineInstructionInfo
-// Interface to description of machine instructions
-//---------------------------------------------------------------------------
-
-
-/*ctor*/
-MachineInstrInfo::MachineInstrInfo(const MachineInstrDescriptor* _desc,
- unsigned int _descSize,
- unsigned int _numRealOpCodes)
- : desc(_desc), descSize(_descSize), numRealOpCodes(_numRealOpCodes)
-{
- assert(TargetInstrDescriptors == NULL && desc != NULL);
- TargetInstrDescriptors = desc; // initialize global variable
-}
-
+// TargetMachine Class
+//
-/*dtor*/
-MachineInstrInfo::~MachineInstrInfo()
-{
- TargetInstrDescriptors = NULL; // reset global variable
+TargetMachine::TargetMachine(const Target &T,
+ StringRef TT, StringRef CPU, StringRef FS)
+ : TheTarget(T), TargetTriple(TT), TargetCPU(CPU), TargetFS(FS),
+ CodeGenInfo(0), AsmInfo(0),
+ MCRelaxAll(false),
+ MCNoExecStack(false),
+ MCSaveTempLabels(false),
+ MCUseLoc(true),
+ MCUseCFI(true) {
+ // Typically it will be subtargets that will adjust FloatABIType from Default
+ // to Soft or Hard.
+ if (UseSoftFloat)
+ FloatABIType = FloatABI::Soft;
}
-
-bool
-MachineInstrInfo::constantFitsInImmedField(MachineOpCode opCode,
- int64_t intValue) const
-{
- // First, check if opCode has an immed field.
- bool isSignExtended;
- uint64_t maxImmedValue = this->maxImmedConstant(opCode, isSignExtended);
- if (maxImmedValue != 0)
- {
- // Now check if the constant fits
- if (intValue <= (int64_t) maxImmedValue &&
- intValue >= -((int64_t) maxImmedValue+1))
- return true;
- }
-
- return false;
+TargetMachine::~TargetMachine() {
+ delete CodeGenInfo;
+ delete AsmInfo;
}
+/// getRelocationModel - Returns the code generation relocation model. The
+/// choices are static, PIC, and dynamic-no-pic, and target default.
+Reloc::Model TargetMachine::getRelocationModel() const {
+ if (!CodeGenInfo)
+ return Reloc::Default;
+ return CodeGenInfo->getRelocationModel();
+}
-//---------------------------------------------------------------------------
-// class MachineSchedInfo
-// Interface to machine description for instruction scheduling
-//---------------------------------------------------------------------------
+/// getCodeModel - Returns the code model. The choices are small, kernel,
+/// medium, large, and target default.
+CodeModel::Model TargetMachine::getCodeModel() const {
+ if (!CodeGenInfo)
+ return CodeModel::Default;
+ return CodeGenInfo->getCodeModel();
+}
-/*ctor*/
-MachineSchedInfo::MachineSchedInfo(int _numSchedClasses,
- const MachineInstrInfo* _mii,
- const InstrClassRUsage* _classRUsages,
- const InstrRUsageDelta* _usageDeltas,
- const InstrIssueDelta* _issueDeltas,
- unsigned int _numUsageDeltas,
- unsigned int _numIssueDeltas)
- : numSchedClasses(_numSchedClasses),
- mii(_mii),
- classRUsages(_classRUsages),
- usageDeltas(_usageDeltas),
- issueDeltas(_issueDeltas),
- numUsageDeltas(_numUsageDeltas),
- numIssueDeltas(_numIssueDeltas)
-{
+bool TargetMachine::getAsmVerbosityDefault() {
+ return AsmVerbosityDefault;
}
-void
-MachineSchedInfo::initializeResources()
-{
- assert(MAX_NUM_SLOTS >= (int) getMaxNumIssueTotal()
- && "Insufficient slots for static data! Increase MAX_NUM_SLOTS");
-
- // First, compute common resource usage info for each class because
- // most instructions will probably behave the same as their class.
- // Cannot allocate a vector of InstrRUsage so new each one.
- //
- vector<InstrRUsage> instrRUForClasses;
- instrRUForClasses.resize(numSchedClasses);
- for (InstrSchedClass sc=0; sc < numSchedClasses; sc++)
- {
- // instrRUForClasses.push_back(new InstrRUsage);
- instrRUForClasses[sc].setMaxSlots(getMaxNumIssueTotal());
- instrRUForClasses[sc] = classRUsages[sc];
- }
-
- computeInstrResources(instrRUForClasses);
-
- computeIssueGaps(instrRUForClasses);
+void TargetMachine::setAsmVerbosityDefault(bool V) {
+ AsmVerbosityDefault = V;
}
+bool TargetMachine::getFunctionSections() {
+ return FunctionSections;
+}
-void
-MachineSchedInfo::computeInstrResources(const vector<InstrRUsage>& instrRUForClasses)
-{
- int numOpCodes = mii->getNumRealOpCodes();
- instrRUsages.resize(numOpCodes);
-
- // First get the resource usage information from the class resource usages.
- for (MachineOpCode op=0; op < numOpCodes; op++)
- {
- InstrSchedClass sc = getSchedClass(op);
- assert(sc >= 0 && sc < numSchedClasses);
- instrRUsages[op] = instrRUForClasses[sc];
- }
-
- // Now, modify the resource usages as specified in the deltas.
- for (unsigned i=0; i < numUsageDeltas; i++)
- {
- MachineOpCode op = usageDeltas[i].opCode;
- assert(op < numOpCodes);
- instrRUsages[op].addUsageDelta(usageDeltas[i]);
- }
-
- // Then modify the issue restrictions as specified in the deltas.
- for (unsigned i=0; i < numIssueDeltas; i++)
- {
- MachineOpCode op = issueDeltas[i].opCode;
- assert(op < numOpCodes);
- instrRUsages[issueDeltas[i].opCode].addIssueDelta(issueDeltas[i]);
- }
+bool TargetMachine::getDataSections() {
+ return DataSections;
}
+void TargetMachine::setFunctionSections(bool V) {
+ FunctionSections = V;
+}
-void
-MachineSchedInfo::computeIssueGaps(const vector<InstrRUsage>& instrRUForClasses)
-{
- int numOpCodes = mii->getNumRealOpCodes();
- instrRUsages.resize(numOpCodes);
-
- assert(numOpCodes < (1 << MAX_OPCODE_SIZE) - 1
- && "numOpCodes invalid for implementation of class OpCodePair!");
-
- // First, compute issue gaps between pairs of classes based on common
- // resources usages for each class, because most instruction pairs will
- // usually behave the same as their class.
- //
- int classPairGaps[numSchedClasses][numSchedClasses];
- for (InstrSchedClass fromSC=0; fromSC < numSchedClasses; fromSC++)
- for (InstrSchedClass toSC=0; toSC < numSchedClasses; toSC++)
- {
- int classPairGap = ComputeMinGap(instrRUForClasses[fromSC],
- instrRUForClasses[toSC]);
- classPairGaps[fromSC][toSC] = classPairGap;
- }
-
- // Now, for each pair of instructions, use the class pair gap if both
- // instructions have identical resource usage as their respective classes.
- // If not, recompute the gap for the pair from scratch.
+void TargetMachine::setDataSections(bool V) {
+ DataSections = V;
+}
- longestIssueConflict = 0;
-
- for (MachineOpCode fromOp=0; fromOp < numOpCodes; fromOp++)
- for (MachineOpCode toOp=0; toOp < numOpCodes; toOp++)
- {
- int instrPairGap =
- (instrRUsages[fromOp].sameAsClass && instrRUsages[toOp].sameAsClass)
- ? classPairGaps[getSchedClass(fromOp)][getSchedClass(toOp)]
- : ComputeMinGap(instrRUsages[fromOp], instrRUsages[toOp]);
-
- if (instrPairGap > 0)
- {
- issueGaps[OpCodePair(fromOp,toOp)] = instrPairGap;
- conflictLists[fromOp].push_back(toOp);
- longestIssueConflict = max(longestIssueConflict, instrPairGap);
- }
+namespace llvm {
+ /// DisableFramePointerElim - This returns true if frame pointer elimination
+ /// optimization should be disabled for the given machine function.
+ bool DisableFramePointerElim(const MachineFunction &MF) {
+ // Check to see if we should eliminate non-leaf frame pointers and then
+ // check to see if we should eliminate all frame pointers.
+ if (NoFramePointerElimNonLeaf && !NoFramePointerElim) {
+ const MachineFrameInfo *MFI = MF.getFrameInfo();
+ return MFI->hasCalls();
}
-}
+ return NoFramePointerElim;
+ }
-// Check if fromRVec and toRVec have *any* common entries.
-// Assume the vectors are sorted in increasing order.
-// Algorithm copied from function set_intersection() for sorted ranges (stl_algo.h).
-inline static bool
-RUConflict(const vector<resourceId_t>& fromRVec,
- const vector<resourceId_t>& toRVec)
-{
- bool commonElementFound = false;
-
- unsigned fN = fromRVec.size(), tN = toRVec.size();
- unsigned fi = 0, ti = 0;
- while (fi < fN && ti < tN)
- if (fromRVec[fi] < toRVec[ti])
- ++fi;
- else if (toRVec[ti] < fromRVec[fi])
- ++ti;
- else
- {
- commonElementFound = true;
- break;
- }
-
- return commonElementFound;
-}
+ /// LessPreciseFPMAD - This flag return true when -enable-fp-mad option
+ /// is specified on the command line. When this flag is off(default), the
+ /// code generator is not allowed to generate mad (multiply add) if the
+ /// result is "less precise" than doing those operations individually.
+ bool LessPreciseFPMAD() { return UnsafeFPMath || LessPreciseFPMADOption; }
+ /// HonorSignDependentRoundingFPMath - Return true if the codegen must assume
+ /// that the rounding mode of the FPU can change from its default.
+ bool HonorSignDependentRoundingFPMath() {
+ return !UnsafeFPMath && HonorSignDependentRoundingFPMathOption;
+ }
-static cycles_t
-ComputeMinGap(const InstrRUsage& fromRU, const InstrRUsage& toRU)
-{
- cycles_t minGap = 0;
-
- if (fromRU.numBubbles > 0)
- minGap = fromRU.numBubbles;
-
- if (minGap < fromRU.numCycles)
- {
- // only need to check from cycle `minGap' onwards
- for (cycles_t gap=minGap; gap <= fromRU.numCycles-1; gap++)
- {
- // check if instr. #2 can start executing `gap' cycles after #1
- // by checking for resource conflicts in each overlapping cycle
- cycles_t numOverlap = min(fromRU.numCycles - gap, toRU.numCycles);
- for (cycles_t c = 0; c <= numOverlap-1; c++)
- if (RUConflict(fromRU.resourcesByCycle[gap + c],
- toRU.resourcesByCycle[c]))
- {// conflict found so minGap must be more than `gap'
- minGap = gap+1;
- break;
- }
- }
- }
-
- return minGap;
+ /// getTrapFunctionName - If this returns a non-empty string, this means isel
+ /// should lower Intrinsic::trap to a call to the specified function name
+ /// instead of an ISD::TRAP node.
+ StringRef getTrapFunctionName() {
+ return TrapFuncName;
+ }
}
-
-//---------------------------------------------------------------------------
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