Introduce a new technique for merging BasicBlock with Instruction sentinel by superpo...

[oota-llvm.git] / lib / Target / TargetRegisterInfo.cpp

diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp
index 37745ec95d40c548af6d3bead019b99881f58529..d9911e9e9a1840213e5afd99e45334071c2df13f 100644 (file)
--- a/lib/Target/TargetRegisterInfo.cpp
+++ b/lib/Target/TargetRegisterInfo.cpp
@@ -24,8 +24,8 @@ TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
                              regclass_iterator RCB, regclass_iterator RCE,
                              int CFSO, int CFDO,
                              const unsigned* subregs, const unsigned subregsize)
-  : Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE),
-    SubregHash(subregs), SubregHashSize(subregsize) {
+  : SubregHash(subregs), SubregHashSize(subregsize), Desc(D), NumRegs(NR),
+    RegClassBegin(RCB), RegClassEnd(RCE) {
   assert(NumRegs < FirstVirtualRegister &&
          "Target has too many physical registers!");
 
@@ -35,17 +35,6 @@ TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
 
 TargetRegisterInfo::~TargetRegisterInfo() {}
 
-namespace {
-  // Sort according to super- / sub- class relations.
-  // i.e. super- register class < sub- register class.
-  struct RCCompare {
-    bool operator()(const TargetRegisterClass* const &LHS,
-                    const TargetRegisterClass* const &RHS) {
-      return RHS->hasSuperClass(LHS);
-    }
-  };
-}
-
 /// getPhysicalRegisterRegClass - Returns the Register Class of a physical
 /// register of the given type. If type is MVT::Other, then just return any
 /// register class the register belongs to.
@@ -53,24 +42,18 @@ const TargetRegisterClass *
 TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, MVT VT) const {
   assert(isPhysicalRegister(reg) && "reg must be a physical register");
 
-  // Pick the register class of the right type that contains this physreg.
-  SmallVector<const TargetRegisterClass*, 4> RCs;
+  // Pick the most super register class of the right type that contains
+  // this physreg.
+  const TargetRegisterClass* BestRC = 0;
   for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){
-    if ((VT == MVT::Other || (*I)->hasType(VT)) && (*I)->contains(reg))
-      RCs.push_back(*I);
-  }
-
-  if (RCs.size() == 1)
-    return RCs[0];
-
-  if (RCs.size()) {
-    // Multiple compatible register classes. Get the super- class.
-    std::stable_sort(RCs.begin(), RCs.end(), RCCompare());
-    return RCs[0];
+    const TargetRegisterClass* RC = *I;
+    if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) &&
+        (!BestRC || BestRC->hasSuperClass(RC)))
+      BestRC = RC;
   }
 
-  assert(false && "Couldn't find the register class");
-  return 0;
+  assert(BestRC && "Couldn't find the register class");
+  return BestRC;
 }
 
 /// getAllocatableSetForRC - Toggle the bits that represent allocatable