Do not use variable sized arrays in C++, they are non-portable. Patch

[oota-llvm.git] / lib / Target / TargetSchedInfo.cpp

diff --git a/lib/Target/TargetSchedInfo.cpp b/lib/Target/TargetSchedInfo.cpp
index 33538cec9e8ed8450ac97156d85e60badb7d4022..4d2b5ed9f9ce343ac4be240cf1da0aaac8329860 100644 (file)
--- a/lib/Target/TargetSchedInfo.cpp
+++ b/lib/Target/TargetSchedInfo.cpp
@@ -12,12 +12,29 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/Config/alloca.h"
 #include "llvm/Target/TargetSchedInfo.h"
 #include "llvm/Target/TargetMachine.h"
+#include <algorithm>
+#include <iostream>
+using namespace llvm;
 
-namespace llvm {
+resourceId_t llvm::CPUResource::nextId = 0;
+static std::vector<CPUResource*> *CPUResourceMap = 0;
+  
+CPUResource::CPUResource(const std::string& resourceName, int maxUsers)
+    : rname(resourceName), rid(nextId++), maxNumUsers(maxUsers) {
+  if(!CPUResourceMap)
+    CPUResourceMap = new std::vector<CPUResource*>;
 
-resourceId_t MachineResource::nextId = 0;
+  //Put Resource in the map
+  CPUResourceMap->push_back(this);
+}
+
+///Get CPUResource if you only have the resource ID
+CPUResource* CPUResource::getCPUResource(resourceId_t id) {
+  return (*CPUResourceMap)[id];
+}
 
 // Check if fromRVec and toRVec have *any* common entries.
 // Assume the vectors are sorted in increasing order.
@@ -86,7 +103,7 @@ TargetSchedInfo::TargetSchedInfo(const TargetMachine&    tgt,
                                  unsigned NumUsageDeltas,
                                  unsigned NumIssueDeltas)
   : target(tgt),
-    numSchedClasses(NumSchedClasses), mii(& tgt.getInstrInfo()),
+    numSchedClasses(NumSchedClasses), mii(tgt.getInstrInfo()),
     classRUsages(ClassRUsages), usageDeltas(UsageDeltas),
     issueDeltas(IssueDeltas), numUsageDeltas(NumUsageDeltas),
     numIssueDeltas(NumIssueDeltas)
@@ -160,12 +177,13 @@ TargetSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
   // resources usages for each class, because most instruction pairs will
   // usually behave the same as their class.
   // 
-  int classPairGaps[numSchedClasses][numSchedClasses];
+  int* classPairGaps =
+    static_cast<int*>(alloca(sizeof(int) * numSchedClasses * numSchedClasses));
   for (InstrSchedClass fromSC=0; fromSC < numSchedClasses; fromSC++)
     for (InstrSchedClass toSC=0; toSC < numSchedClasses; toSC++) {
       int classPairGap = ComputeMinGap(instrRUForClasses[fromSC],
                                        instrRUForClasses[toSC]);
-      classPairGaps[fromSC][toSC] = classPairGap; 
+      classPairGaps[fromSC*numSchedClasses + toSC] = classPairGap; 
     }
 
   // Now, for each pair of instructions, use the class pair gap if both
@@ -178,7 +196,7 @@ TargetSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
     for (MachineOpCode toOp=0; toOp < numOpCodes; toOp++) {
       int instrPairGap = 
         (instrRUsages[fromOp].sameAsClass && instrRUsages[toOp].sameAsClass)
-        ? classPairGaps[getSchedClass(fromOp)][getSchedClass(toOp)]
+        ? classPairGaps[getSchedClass(fromOp)*numSchedClasses + getSchedClass(toOp)]
         : ComputeMinGap(instrRUsages[fromOp], instrRUsages[toOp]);
 
       if (instrPairGap > 0) {
@@ -213,7 +231,7 @@ void InstrRUsage::setTo(const InstrClassRUsage& classRU) {
   // Sort each resource usage vector by resourceId_t to speed up conflict
   // checking
   for (unsigned i=0; i < this->resourcesByCycle.size(); i++)
-    sort(resourcesByCycle[i].begin(), resourcesByCycle[i].end());
+    std::sort(resourcesByCycle[i].begin(), resourcesByCycle[i].end());
 }
 
 // Add the extra resource usage requirements specified in the delta.
@@ -251,5 +269,3 @@ void InstrRUsage::addUsageDelta(const InstrRUsageDelta &delta) {
       assert(r >= 0 && "Resource to remove was unused in cycle c!");
     }
 }
-
-} // End llvm namespace