//
//===----------------------------------------------------------------------===//
-#include "llvm/Target/MachineSchedInfo.h"
+#include "llvm/Target/TargetSchedInfo.h"
#include "llvm/Target/TargetMachine.h"
resourceId_t MachineResource::nextId = 0;
//---------------------------------------------------------------------------
-// class MachineSchedInfo
+// class TargetSchedInfo
// Interface to machine description for instruction scheduling
//---------------------------------------------------------------------------
-MachineSchedInfo::MachineSchedInfo(const TargetMachine& tgt,
- int NumSchedClasses,
- const InstrClassRUsage* ClassRUsages,
- const InstrRUsageDelta* UsageDeltas,
- const InstrIssueDelta* IssueDeltas,
- unsigned int NumUsageDeltas,
- unsigned int NumIssueDeltas)
+TargetSchedInfo::TargetSchedInfo(const TargetMachine& tgt,
+ int NumSchedClasses,
+ const InstrClassRUsage* ClassRUsages,
+ const InstrRUsageDelta* UsageDeltas,
+ const InstrIssueDelta* IssueDeltas,
+ unsigned NumUsageDeltas,
+ unsigned NumIssueDeltas)
: target(tgt),
numSchedClasses(NumSchedClasses), mii(& tgt.getInstrInfo()),
classRUsages(ClassRUsages), usageDeltas(UsageDeltas),
{}
void
-MachineSchedInfo::initializeResources()
+TargetSchedInfo::initializeResources()
{
assert(MAX_NUM_SLOTS >= (int)getMaxNumIssueTotal()
&& "Insufficient slots for static data! Increase MAX_NUM_SLOTS");
void
-MachineSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
+TargetSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
instrRUForClasses)
{
int numOpCodes = mii->getNumRealOpCodes();
void
-MachineSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
+TargetSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
instrRUForClasses)
{
int numOpCodes = mii->getNumRealOpCodes();