//
//===----------------------------------------------------------------------===//
-#if 0
-
#include "X86Disassembler.h"
#include "X86DisassemblerDecoder.h"
-#include "X86InstrInfo.h"
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCDisassembler.h"
#include "llvm/Support/MemoryObject.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
+
+#include "X86GenRegisterNames.inc"
+
using namespace llvm;
using namespace llvm::X86Disassembler;
};
}
+extern Target TheX86_32Target, TheX86_64Target;
+
}
static void translateInstruction(MCInst &target,
/// @param mcInst - The MCInst to append to.
/// @param insn - The instruction to extract Mod, R/M, and SIB fields
/// from.
+/// @param sr - Whether or not to emit the segment register. The
+/// LEA instruction does not expect a segment-register
+/// operand.
static void translateRMMemory(MCInst &mcInst,
- InternalInstruction &insn) {
+ InternalInstruction &insn,
+ bool sr) {
// Addresses in an MCInst are represented as five operands:
// 1. basereg (register) The R/M base, or (if there is a SIB) the
// SIB base
default:
llvm_unreachable("Unexpected sibBase");
#define ENTRY(x) \
- case SIB_BASE_##x: \
+ case SIB_BASE_##x: \
baseReg = MCOperand::CreateReg(X86::x); break;
ALL_SIB_BASES
#undef ENTRY
switch (insn.sibIndex) {
default:
llvm_unreachable("Unexpected sibIndex");
-#define ENTRY(x) \
+#define ENTRY(x) \
case SIB_INDEX_##x: \
indexReg = MCOperand::CreateReg(X86::x); break;
EA_BASES_32BIT
break;
}
}
+
+ scaleAmount = MCOperand::CreateImm(1);
}
displacement = MCOperand::CreateImm(insn.displacement);
mcInst.addOperand(scaleAmount);
mcInst.addOperand(indexReg);
mcInst.addOperand(displacement);
- mcInst.addOperand(segmentReg);
+
+ if (sr)
+ mcInst.addOperand(segmentReg);
}
/// translateRM - Translates an operand stored in the R/M (and possibly SIB)
case TYPE_M1616:
case TYPE_M1632:
case TYPE_M1664:
- translateRMMemory(mcInst, insn);
+ translateRMMemory(mcInst, insn, true);
+ break;
+ case TYPE_LEA:
+ translateRMMemory(mcInst, insn, false);
break;
}
}
TargetRegistry::RegisterMCDisassembler(TheX86_64Target,
createX86_64Disassembler);
}
-
-#endif
-
-extern "C" void LLVMInitializeX86Disassembler() {
-}