Disable this peephole for now. We can't keep track of the fact that the immediate...

[oota-llvm.git] / lib / Target / X86 / X86.h

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index 81c68da58e9b1e5cd522828e3165826db29dffa3..54e2861a5f6e8d173029b5671d748f8bb7ba22c5 100644 (file)
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -1,4 +1,11 @@
 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
 //
 // This file contains the entry points for global functions defined in the x86
 // target library, as used by the LLVM JIT.
@@ -9,56 +16,69 @@
 #define TARGET_X86_H
 
 #include <iosfwd>
+
+namespace llvm {
+
 class TargetMachine;
-class Pass;
+class FunctionPass;
+class IntrinsicLowering;
 
-/// createSimpleX86InstructionSelector - This pass converts an LLVM function
-/// into a machine code representation is a very simple peep-hole fashion.  The
+/// createX86SimpleInstructionSelector - This pass converts an LLVM function
+/// into a machine code representation in a very simple peep-hole fashion.  The
 /// generated code sucks but the implementation is nice and simple.
 ///
-Pass *createSimpleX86InstructionSelector(TargetMachine &TM);
+FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM);
+
+/// createX86PatternInstructionSelector - This pass converts an LLVM function
+/// into a machine code representation using pattern matching and a machine
+/// description file.
+///
+FunctionPass *createX86PatternInstructionSelector(TargetMachine &TM);
+
+/// createX86SSAPeepholeOptimizerPass - Create a pass to perform SSA-based X86
+/// specific peephole optimizations.
+///
+FunctionPass *createX86SSAPeepholeOptimizerPass();
 
 /// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole
 /// optimizations.
 ///
-Pass *createX86PeepholeOptimizerPass();
+FunctionPass *createX86PeepholeOptimizerPass();
+
+/// createX86FloatingPointKiller - This function returns a pass which
+/// kills every floating point register at the end of each basic block
+/// because our FloatingPointStackifier cannot handle them.
+///
+FunctionPass *createX86FloatingPointKillerPass();
 
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into
 /// floating point stack references and physical instructions.
 ///
-Pass *createX86FloatingPointStackifierPass();
+FunctionPass *createX86FloatingPointStackifierPass();
 
 /// createX86CodePrinterPass - Returns a pass that prints the X86
 /// assembly code for a MachineFunction to the given output stream,
 /// using the given target machine description.  This should work
 /// regardless of whether the function is in SSA form.
 ///
-Pass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm);
+FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm);
 
-/// X86EmitCodeToMemory - This function converts a register allocated function
-/// into raw machine code in a dynamically allocated chunk of memory.  A pointer
-/// to the start of the function is returned.
+/// createX86EmitCodeToMemory - Returns a pass that converts a register
+/// allocated function into raw machine code in a dynamically
+/// allocated chunk of memory.
 ///
-Pass *createEmitX86CodeToMemory();
+FunctionPass *createEmitX86CodeToMemory();
 
-/// X86 namespace - This namespace contains all of the register and opcode enums
-/// used by the X86 backend.
-///
-namespace X86 {
-  // Defines a large number of symbolic names for X86 registers.  This defines a
-  // mapping from register name to register number.
-  //
-  enum Register {
-#define R(ENUM, NAME, FLAGS, TSFLAGS, ALIAS_SET) ENUM,
-#include "X86RegisterInfo.def"
-  };
-
-  // This defines a large number of symbolic names for X86 instruction opcodes.
-  enum Opcode {
-#define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS, IMPDEFS, IMPUSES) ENUM,
-#include "X86InstrInfo.def"
-  };
-}
+// Defines symbolic names for X86 registers.  This defines a mapping from
+// register name to register number.
+//
+} // End llvm namespace
+
+#include "X86GenRegisterNames.inc"
+
+// Defines symbolic names for the X86 instructions.
+//
+#include "X86GenInstrNames.inc"
 
 #endif