//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#include "X86TargetAsmInfo.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/CallingConv.h"
+#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/Module.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Target/TargetAsmInfo.h"
STATISTIC(EmittedInsts, "Number of machine instrs printed");
-static std::string computePICLabel(unsigned FnNum,
- const TargetAsmInfo *TAI,
- const X86Subtarget* Subtarget) {
+static std::string getPICLabelString(unsigned FnNum,
+ const TargetAsmInfo *TAI,
+ const X86Subtarget* Subtarget) {
std::string label;
if (Subtarget->isTargetDarwin())
label = "\"L" + utostr_32(FnNum) + "$pb\"";
else if (Subtarget->isTargetELF())
- label = ".Lllvm$" + utostr_32(FnNum) + "$piclabel";
+ label = ".Lllvm$" + utostr_32(FnNum) + "." + "$piclabel";
else
assert(0 && "Don't know how to print PIC label!\n");
if (TAI->doesSupportDebugInformation()) {
// Let PassManager know we need debug information and relay
// the MachineModuleInfo address on to DwarfWriter.
- DW.SetModuleInfo(&getAnalysis<MachineModuleInfo>());
+ MMI = &getAnalysis<MachineModuleInfo>();
+ DW.SetModuleInfo(MMI);
}
SetupMachineFunction(MF);
SwitchToTextSection(getSectionForFunction(*F).c_str(), F);
+ unsigned FnAlign = OptimizeForSize ? 1 : 4;
switch (F->getLinkage()) {
default: assert(0 && "Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
- EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
+ EmitAlignment(FnAlign, F);
break;
case Function::DLLExportLinkage:
DLLExportedFns.insert(Mang->makeNameProper(F->getName(), ""));
//FALLS THROUGH
case Function::ExternalLinkage:
- EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
+ EmitAlignment(FnAlign, F);
O << "\t.globl\t" << CurrentFnName << "\n";
break;
case Function::LinkOnceLinkage:
case Function::WeakLinkage:
+ EmitAlignment(FnAlign, F);
if (Subtarget->isTargetDarwin()) {
- EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
O << "\t.globl\t" << CurrentFnName << "\n";
- O << "\t.weak_definition\t" << CurrentFnName << "\n";
+ O << TAI->getWeakDefDirective() << CurrentFnName << "\n";
} else if (Subtarget->isTargetCygMing()) {
- EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
- O << "\t.globl " << CurrentFnName << "\n";
+ O << "\t.globl\t" << CurrentFnName << "\n";
O << "\t.linkonce discard\n";
} else {
- EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
- O << "\t.weak " << CurrentFnName << "\n";
+ O << "\t.weak\t" << CurrentFnName << "\n";
}
break;
}
}
if (Subtarget->isTargetELF())
- O << "\t.type " << CurrentFnName << ",@function\n";
+ O << "\t.type\t" << CurrentFnName << ",@function\n";
else if (Subtarget->isTargetCygMing()) {
O << "\t.def\t " << CurrentFnName
<< ";\t.scl\t" <<
F->getLinkage() == Function::WeakLinkage))
O << "Lllvm$workaround$fake$stub$" << CurrentFnName << ":\n";
- if (TAI->doesSupportDebugInformation()) {
- // Emit pre-function debug information.
+ if (TAI->doesSupportDebugInformation() ||
+ TAI->doesSupportExceptionHandling()) {
+ // Emit pre-function debug and/or EH information.
DW.BeginFunction(&MF);
}
// Print out code for the function.
+ bool hasAnyRealCode = false;
for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
I != E; ++I) {
// Print a label for the basic block.
- if (I->pred_begin() != I->pred_end()) {
- printBasicBlockLabel(I, true);
+ if (!I->pred_empty()) {
+ printBasicBlockLabel(I, true, true);
O << '\n';
}
- for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
- II != E; ++II) {
+ for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end();
+ II != IE; ++II) {
// Print the assembly for the instruction.
- O << "\t";
+ if (II->getOpcode() != X86::LABEL)
+ hasAnyRealCode = true;
printMachineInstruction(II);
}
}
+ if (Subtarget->isTargetDarwin() && !hasAnyRealCode) {
+ // If the function is empty, then we need to emit *something*. Otherwise,
+ // the function's label might be associated with something that it wasn't
+ // meant to be associated with. We emit a noop in this situation.
+ // We are assuming inline asms are code.
+ O << "\tnop\n";
+ }
+
if (TAI->hasDotTypeDotSizeDirective())
- O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
+ O << "\t.size\t" << CurrentFnName << ", .-" << CurrentFnName << "\n";
if (TAI->doesSupportDebugInformation()) {
// Emit post-function debug information.
return false;
}
-static inline bool printGOT(TargetMachine &TM, const X86Subtarget* ST) {
+static inline bool shouldPrintGOT(TargetMachine &TM, const X86Subtarget* ST) {
return ST->isPICStyleGOT() && TM.getRelocationModel() == Reloc::PIC_;
}
-static inline bool printStub(TargetMachine &TM, const X86Subtarget* ST) {
+static inline bool shouldPrintPLT(TargetMachine &TM, const X86Subtarget* ST) {
+ return ST->isTargetELF() && TM.getRelocationModel() == Reloc::PIC_ &&
+ (ST->isPICStyleRIPRel() || ST->isPICStyleGOT());
+}
+
+static inline bool shouldPrintStub(TargetMachine &TM, const X86Subtarget* ST) {
return ST->isPICStyleStub() && TM.getRelocationModel() != Reloc::Static;
}
void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
const char *Modifier, bool NotRIPRel) {
const MachineOperand &MO = MI->getOperand(OpNo);
- const MRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
case MachineOperand::MO_Register: {
- assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
+ assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
"Virtual registers should not make it this far!");
O << '%';
unsigned Reg = MO.getReg();
if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
- MVT::ValueType VT = (strcmp(Modifier+6,"64") == 0) ?
+ MVT VT = (strcmp(Modifier+6,"64") == 0) ?
MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 :
((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
Reg = getX86SubSuperRegister(Reg, VT);
}
- for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
+ for (const char *Name = TRI->getAsmName(Reg); *Name; ++Name)
O << (char)tolower(*Name);
return;
}
if (!Modifier ||
(strcmp(Modifier, "debug") && strcmp(Modifier, "mem")))
O << '$';
- O << MO.getImmedValue();
+ O << MO.getImm();
return;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_JumpTableIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << '$';
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << "_"
- << MO.getJumpTableIndex();
+ << MO.getIndex();
if (TM.getRelocationModel() == Reloc::PIC_) {
if (Subtarget->isPICStyleStub())
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << '$';
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
- << MO.getConstantPoolIndex();
+ << MO.getIndex();
if (TM.getRelocationModel() == Reloc::PIC_) {
if (Subtarget->isPICStyleStub())
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
bool needCloseParen = false;
- GlobalValue *GV = MO.getGlobal();
- GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
+ const GlobalValue *GV = MO.getGlobal();
+ const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
+ if (!GVar) {
+ // If GV is an alias then use the aliasee for determining
+ // thread-localness.
+ if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
+ GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal());
+ }
+
bool isThreadLocal = GVar && GVar->isThreadLocal();
std::string Name = Mang->getValueName(GV);
needCloseParen = true;
}
- if (printStub(TM, Subtarget)) {
+ if (shouldPrintStub(TM, Subtarget)) {
// Link-once, declaration, or Weakly-linked global variables need
// non-lazily-resolved stubs
if (GV->isDeclaration() ||
GV->hasWeakLinkage() ||
- GV->hasLinkOnceLinkage()) {
+ GV->hasLinkOnceLinkage() ||
+ GV->hasCommonLinkage()) {
// Dynamically-resolved functions need a stub for the function.
if (isCallOp && isa<Function>(GV)) {
FnStubs.insert(Name);
- O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
+ printSuffixedName(Name, "$stub");
} else {
GVStubs.insert(Name);
- O << TAI->getPrivateGlobalPrefix() << Name << "$non_lazy_ptr";
+ printSuffixedName(Name, "$non_lazy_ptr");
}
} else {
if (GV->hasDLLImportLinkage())
}
if (!isCallOp && TM.getRelocationModel() == Reloc::PIC_)
- O << "-\"" << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
- << "$pb\"";
+ O << '-' << getPICLabelString(getFunctionNumber(), TAI, Subtarget);
} else {
if (GV->hasDLLImportLinkage()) {
O << "__imp_";
}
O << Name;
- if (isCallOp && isa<Function>(GV)) {
- if (printGOT(TM, Subtarget)) {
- // Assemble call via PLT for non-local symbols
- if (!(GV->hasHiddenVisibility() || GV->hasProtectedVisibility()) ||
- GV->isDeclaration())
+ if (isCallOp) {
+ if (shouldPrintPLT(TM, Subtarget)) {
+ // Assemble call via PLT for externally visible symbols
+ if (!GV->hasHiddenVisibility() && !GV->hasProtectedVisibility() &&
+ !GV->hasInternalLinkage())
O << "@PLT";
}
if (Subtarget->isTargetCygMing() && GV->isDeclaration())
if (GV->hasExternalWeakLinkage())
ExtWeakSymbols.insert(GV);
-
+
int Offset = MO.getOffset();
if (Offset > 0)
O << "+" << Offset;
O << Offset;
if (isThreadLocal) {
- if (TM.getRelocationModel() == Reloc::PIC_)
+ if (TM.getRelocationModel() == Reloc::PIC_ || Subtarget->is64Bit())
O << "@TLSGD"; // general dynamic TLS model
else
if (GV->isDeclaration())
else
O << "@NTPOFF"; // local exec TLS model
} else if (isMemOp) {
- if (printGOT(TM, Subtarget)) {
+ if (shouldPrintGOT(TM, Subtarget)) {
if (Subtarget->GVRequiresExtraLoad(GV, TM, false))
O << "@GOT";
else
O << "@GOTOFF";
- } else if (Subtarget->isPICStyleRIPRel() && !NotRIPRel) {
- if ((GV->isDeclaration() ||
- GV->hasWeakLinkage() ||
- GV->hasLinkOnceLinkage()) &&
- TM.getRelocationModel() != Reloc::Static)
+ } else if (Subtarget->isPICStyleRIPRel() && !NotRIPRel &&
+ TM.getRelocationModel() != Reloc::Static) {
+ if (Subtarget->GVRequiresExtraLoad(GV, TM, false))
O << "@GOTPCREL";
if (needCloseParen) {
bool needCloseParen = false;
std::string Name(TAI->getGlobalPrefix());
Name += MO.getSymbolName();
- if (isCallOp && printStub(TM, Subtarget)) {
+ if (isCallOp && shouldPrintStub(TM, Subtarget)) {
FnStubs.insert(Name);
- O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
+ printSuffixedName(Name, "$stub");
return;
}
if (!isCallOp)
O << Name;
- if (printGOT(TM, Subtarget)) {
+ if (shouldPrintPLT(TM, Subtarget)) {
std::string GOTName(TAI->getGlobalPrefix());
GOTName+="_GLOBAL_OFFSET_TABLE_";
if (Name == GOTName)
// popl %some_register
// addl $_GLOBAL_ADDRESS_TABLE_ + [.-piclabel], %some_register
O << " + [.-"
- << computePICLabel(getFunctionNumber(), TAI, Subtarget) << "]";
+ << getPICLabelString(getFunctionNumber(), TAI, Subtarget) << "]";
if (isCallOp)
O << "@PLT";
}
void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
- unsigned char value = MI->getOperand(Op).getImmedValue();
+ unsigned char value = MI->getOperand(Op).getImm();
assert(value <= 7 && "Invalid ssecc argument!");
switch (value) {
case 0: O << "eq"; break;
DispSpec.isJumpTableIndex()) {
printOperand(MI, Op+3, "mem", NotRIPRel);
} else {
- int DispVal = DispSpec.getImmedValue();
+ int DispVal = DispSpec.getImm();
if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
O << DispVal;
}
if (IndexReg.getReg() || BaseReg.getReg()) {
- unsigned ScaleVal = MI->getOperand(Op+1).getImmedValue();
+ unsigned ScaleVal = MI->getOperand(Op+1).getImm();
unsigned BaseRegOperand = 0, IndexRegOperand = 2;
// There are cases where we can end up with ESP/RSP in the indexreg slot.
}
}
+void X86ATTAsmPrinter::printPICJumpTableSetLabel(unsigned uid,
+ const MachineBasicBlock *MBB) const {
+ if (!TAI->getSetDirective())
+ return;
+
+ // We don't need .set machinery if we have GOT-style relocations
+ if (Subtarget->isPICStyleGOT())
+ return;
+
+ O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix()
+ << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ',';
+ printBasicBlockLabel(MBB, false, false, false);
+ if (Subtarget->isPICStyleRIPRel())
+ O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
+ << '_' << uid << '\n';
+ else
+ O << '-' << getPICLabelString(getFunctionNumber(), TAI, Subtarget) << '\n';
+}
+
void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
- std::string label = computePICLabel(getFunctionNumber(), TAI, Subtarget);
+ std::string label = getPICLabelString(getFunctionNumber(), TAI, Subtarget);
O << label << "\n" << label << ":";
}
+void X86ATTAsmPrinter::printPICJumpTableEntry(const MachineJumpTableInfo *MJTI,
+ const MachineBasicBlock *MBB,
+ unsigned uid) const
+{
+ const char *JTEntryDirective = MJTI->getEntrySize() == 4 ?
+ TAI->getData32bitsDirective() : TAI->getData64bitsDirective();
+
+ O << JTEntryDirective << ' ';
+
+ if (TM.getRelocationModel() == Reloc::PIC_) {
+ if (Subtarget->isPICStyleRIPRel() || Subtarget->isPICStyleStub()) {
+ O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
+ << '_' << uid << "_set_" << MBB->getNumber();
+ } else if (Subtarget->isPICStyleGOT()) {
+ printBasicBlockLabel(MBB, false, false, false);
+ O << "@GOTOFF";
+ } else
+ assert(0 && "Don't know how to print MBB label for this PIC mode");
+ } else
+ printBasicBlockLabel(MBB, false, false, false);
+}
+
bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO,
const char Mode) {
- const MRegisterInfo &RI = *TM.getRegisterInfo();
unsigned Reg = MO.getReg();
switch (Mode) {
default: return true; // Unknown mode.
case 'k': // Print SImode register
Reg = getX86SubSuperRegister(Reg, MVT::i32);
break;
+ case 'q': // Print DImode register
+ Reg = getX86SubSuperRegister(Reg, MVT::i64);
+ break;
}
O << '%';
- for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
+ for (const char *Name = TRI->getAsmName(Reg); *Name; ++Name)
O << (char)tolower(*Name);
return false;
}
case 'h': // Print QImode high register
case 'w': // Print HImode register
case 'k': // Print SImode register
- if (MI->getOperand(OpNo).isReg())
+ case 'q': // Print DImode register
+ if (MI->getOperand(OpNo).isRegister())
return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
printOperand(MI, OpNo);
return false;
unsigned OpNo,
unsigned AsmVariant,
const char *ExtraCode) {
- if (ExtraCode && ExtraCode[0])
- return true; // Unknown modifier.
+ if (ExtraCode && ExtraCode[0]) {
+ if (ExtraCode[1] != 0) return true; // Unknown modifier.
+
+ switch (ExtraCode[0]) {
+ default: return true; // Unknown modifier.
+ case 'b': // Print QImode register
+ case 'h': // Print QImode high register
+ case 'w': // Print HImode register
+ case 'k': // Print SImode register
+ case 'q': // Print SImode register
+ // These only apply to registers, ignore on mem.
+ break;
+ }
+ }
printMemReference(MI, OpNo);
return false;
}
void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
++EmittedInsts;
- // See if a truncate instruction can be turned into a nop.
- switch (MI->getOpcode()) {
- default: break;
- case X86::TRUNC_64to32:
- case X86::TRUNC_64to16:
- case X86::TRUNC_32to16:
- case X86::TRUNC_32to8:
- case X86::TRUNC_16to8:
- case X86::TRUNC_32_to8:
- case X86::TRUNC_16_to8: {
- const MachineOperand &MO0 = MI->getOperand(0);
- const MachineOperand &MO1 = MI->getOperand(1);
- unsigned Reg0 = MO0.getReg();
- unsigned Reg1 = MO1.getReg();
- unsigned Opc = MI->getOpcode();
- if (Opc == X86::TRUNC_64to32)
- Reg1 = getX86SubSuperRegister(Reg1, MVT::i32);
- else if (Opc == X86::TRUNC_32to16 || Opc == X86::TRUNC_64to16)
- Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
- else
- Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
- O << TAI->getCommentString() << " TRUNCATE ";
- if (Reg0 != Reg1)
- O << "\n\t";
- break;
- }
- case X86::PsMOVZX64rr32:
- O << TAI->getCommentString() << " ZERO-EXTEND " << "\n\t";
- break;
- }
-
// Call the autogenerated instruction printer routines.
printInstruction(MI);
}
// Include the auto-generated portion of the assembly writer.
#include "X86GenAsmWriter.inc"
-
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